blob: 4646b29508f01dae8c9340231b1518b944e85762 [file] [log] [blame]
Simon Glass87f938c2012-02-27 10:52:49 +00001/*
Jim Lin8b3f7bf2012-06-24 20:40:57 +00002 * Copyright (c) 2009-2012 NVIDIA Corporation
Simon Glass87f938c2012-02-27 10:52:49 +00003 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
24#include <usb.h>
25
26#include "ehci.h"
27#include "ehci-core.h"
28
29#include <asm/errno.h>
30#include <asm/arch/usb.h>
31
Jim Lin8b3f7bf2012-06-24 20:40:57 +000032/*
33 * A known hardware issue where Connect Status Change bit of PORTSC register
34 * of USB1 controller will be set after Port Reset.
35 * We have to clear it in order for later device enumeration to proceed.
36 * This ehci_powerup_fixup overrides the weak function ehci_powerup_fixup
37 * in "ehci-hcd.c".
38 */
39void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
40{
41 mdelay(50);
42 if (((u32) status_reg & TEGRA_USB_ADDR_MASK) != TEGRA_USB1_BASE)
43 return;
44 /* For EHCI_PS_CSC to be cleared in ehci_hcd.c */
45 if (ehci_readl(status_reg) & EHCI_PS_CSC)
46 *reg |= EHCI_PS_CSC;
47}
Simon Glass87f938c2012-02-27 10:52:49 +000048
49/*
50 * Create the appropriate control structures to manage
51 * a new EHCI host controller.
52 */
53int ehci_hcd_init(void)
54{
55 u32 our_hccr, our_hcor;
56
57 /*
58 * Select the first port, as we don't have a way of selecting others
59 * yet
60 */
61 if (tegrausb_start_port(0, &our_hccr, &our_hcor))
62 return -1;
63
64 hccr = (struct ehci_hccr *)our_hccr;
65 hcor = (struct ehci_hcor *)our_hcor;
66
67 return 0;
68}
69
70/*
71 * Destroy the appropriate control structures corresponding
72 * the the EHCI host controller.
73 */
74int ehci_hcd_stop(void)
75{
76 tegrausb_stop_port();
77 return 0;
78}