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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / f1754f08102781f855370c7d47db0e3d85da5694 / . / drivers / gpio / Kconfig
blob: b121979dddd7c42743b0e415513dba68a9111b13 [file] [log] [blame]
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +0900[diff] [blame]1#
2# GPIO infrastructure and drivers
3#
4
5menu "GPIO Support"
6
Masahiro Yamadada333ae2014-10-23 22:26:09 +0900[diff] [blame]7config DM_GPIO
8 bool "Enable Driver Model for GPIO drivers"
9 depends on DM
10 help
Simon Glassf94a1be2015-02-05 21:41:35 -0700[diff] [blame]11 Enable driver model for GPIO access. The standard GPIO
12 interface (gpio_get_value(), etc.) is then implemented by
13 the GPIO uclass. Drivers provide methods to query the
14 particular GPIOs that they provide. The uclass interface
15 is defined in include/asm-generic/gpio.h.
Albert ARIBAUD \(3ADEV\)606f7042015-03-31 11:40:46 +0200[diff] [blame]16
Thomas Chou88d5ecf2015-10-21 21:33:45 +0800[diff] [blame]17config ALTERA_PIO
18 bool "Altera PIO driver"
19 depends on DM_GPIO
20 help
21 Select this to enable PIO for Altera devices. Please find
22 details on the "Embedded Peripherals IP User Guide" of Altera.
23
Álvaro Fernández Rojase64bdb22017-05-07 20:09:30 +0200[diff] [blame]24config BCM6345_GPIO
25 bool "BCM6345 GPIO driver"
26 depends on DM_GPIO && ARCH_BMIPS
27 help
28 This driver supports the GPIO banks on BCM6345 SoCs.
29
Marek Vasute30a70c2015-06-23 15:54:19 +0200[diff] [blame]30config DWAPB_GPIO
31 bool "DWAPB GPIO driver"
32 depends on DM && DM_GPIO
33 default n
34 help
35 Support for the Designware APB GPIO driver.
36
Wenyou Yang5a07a5f2017-03-23 12:46:19 +0800[diff] [blame]37config AT91_GPIO
38 bool "AT91 PIO GPIO driver"
39 depends on DM_GPIO
40 default n
41 help
42 Say yes here to select AT91 PIO GPIO driver. AT91 PIO
43 controller manages up to 32 fully programmable input/output
44 lines. Each I/O line may be dedicated as a general-purpose
45 I/O or be assigned to a function of an embedded peripheral.
46 The assignment to a function of an embedded peripheral is
47 the responsibility of AT91 Pinctrl driver. This driver is
48 responsible for the general-purpose I/O.
49
Wenyou Yang2c62c562015-11-04 14:25:13 +0800[diff] [blame]50config ATMEL_PIO4
51 bool "ATMEL PIO4 driver"
Wenyou Yangee3311d2016-07-20 17:16:26 +0800[diff] [blame]52 depends on DM_GPIO
Wenyou Yang2c62c562015-11-04 14:25:13 +0800[diff] [blame]53 default n
54 help
55 Say yes here to support the Atmel PIO4 driver.
56 The PIO4 is new version of Atmel PIO controller, which manages
57 up to 128 fully programmable input/output lines. Each I/O line
58 may be dedicated as a general purpose I/O or be assigned to
59 a function of an embedded peripheral.
60
Simon Glass64b17972016-03-11 22:07:27 -0700[diff] [blame]61config INTEL_BROADWELL_GPIO
62 bool "Intel Broadwell GPIO driver"
63 depends on DM
64 help
65 This driver supports Broadwell U devices which have an expanded
66 GPIO feature set. The difference is large enough to merit a separate
67 driver from the common Intel ICH6 driver. It supports a total of
68 95 GPIOs which can be configured from the device tree.
69
Bin Meng72436892017-07-30 06:23:28 -0700[diff] [blame]70config INTEL_ICH6_GPIO
71 bool "Intel ICH6 compatible legacy GPIO driver"
72 depends on DM_GPIO
73 help
74 Say yes here to select Intel ICH6 compatible legacy GPIO driver.
75
Peng Fand665eb62017-02-22 16:21:45 +0800[diff] [blame]76config IMX_RGPIO2P
77 bool "i.MX7ULP RGPIO2P driver"
78 depends on DM
79 default n
80 help
81 This driver supports i.MX7ULP Rapid GPIO2P controller.
82
Eugeniy Paltsev3194c3c2017-10-16 16:21:32 +0300[diff] [blame]83config HSDK_CREG_GPIO
84 bool "HSDK CREG GPIO griver"
Alexey Brodkind5fbcd52017-12-10 20:55:44 +0300[diff] [blame]85 depends on DM_GPIO
Eugeniy Paltsev3194c3c2017-10-16 16:21:32 +0300[diff] [blame]86 default n
87 help
88 This driver supports CREG GPIOs on Synopsys HSDK SOC.
89
Albert ARIBAUD \(3ADEV\)606f7042015-03-31 11:40:46 +0200[diff] [blame]90config LPC32XX_GPIO
91 bool "LPC32XX GPIO driver"
92 depends on DM
93 default n
94 help
95 Support for the LPC32XX GPIO driver.
Simon Glassd79c50a2015-03-06 13:19:01 -0700[diff] [blame]96
Mateusz Kulikowski81a87e12016-03-31 23:12:15 +0200[diff] [blame]97config MSM_GPIO
98 bool "Qualcomm GPIO driver"
99 depends on DM_GPIO
100 default n
101 help
102 Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
103 This controller have single bank (default name "soc"), every
104 gpio has it's own set of registers.
105 Only simple GPIO operations are supported (get/set, change of
106 direction and checking pin function).
107 Supported devices:
108 - APQ8016
109 - MSM8916
110
Tom Rini29cb2b32017-05-12 22:33:21 -0400[diff] [blame]111config OMAP_GPIO
112 bool "TI OMAP GPIO driver"
113 depends on ARCH_OMAP2PLUS
114 default y
115 help
116 Support GPIO controllers on the TI OMAP3/4/5 and related (such as
117 AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs.
118
Simon Glass00913622017-08-04 16:34:32 -0600[diff] [blame]119config CMD_PCA953X
120 bool "Enable the pca953x command"
121 help
122 Deprecated: This should be converted to driver model.
123
124 This command provides access to a pca953x GPIO device using the
125 legacy GPIO interface. Several subcommands are provided which mirror
126 the standard 'gpio' command. It should use that instead.
127
Mateusz Kulikowski120800d2016-03-31 23:12:31 +0200[diff] [blame]128config PM8916_GPIO
129 bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
130 depends on DM_GPIO && PMIC_PM8916
131 help
132 Support for GPIO pins and power/reset buttons found on
133 Qualcomm PM8916 PMIC.
134 Default name for GPIO bank is "pm8916".
135 Power and reset buttons are placed in "pm8916_key" bank and
136 have gpio numbers 0 and 1 respectively.
137
Vignesh R5746b0d2016-08-02 10:14:24 +0530[diff] [blame]138config PCF8575_GPIO
139 bool "PCF8575 I2C GPIO Expander driver"
140 depends on DM_GPIO && DM_I2C
141 help
142 Support for PCF8575 I2C 16-bit GPIO expander. Most of these
143 chips are from NXP and TI.
144
Marek Vasutf5f69592017-09-15 21:13:56 +0200[diff] [blame]145config RCAR_GPIO
146 bool "Renesas RCar GPIO driver"
147 depends on DM_GPIO && ARCH_RMOBILE
148 help
149 This driver supports the GPIO banks on Renesas RCar SoCs.
150
Simon Glass1f8f7732015-08-30 16:55:27 -0600[diff] [blame]151config ROCKCHIP_GPIO
152 bool "Rockchip GPIO driver"
153 depends on DM_GPIO
154 help
155 Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
156 a number of banks (different for each SoC type) each with 32 GPIOs.
157 The GPIOs for a device are defined in the device tree with one node
158 for each bank.
159
Simon Glassd79c50a2015-03-06 13:19:01 -0700[diff] [blame]160config SANDBOX_GPIO
161 bool "Enable sandbox GPIO driver"
162 depends on SANDBOX && DM && DM_GPIO
163 help
164 This driver supports some simulated GPIOs which can be adjusted
165 using 'back door' functions like sandbox_gpio_set_value(). Then the
166 GPIOs can be inspected through the normal get_get_value()
167 interface. The purpose of this is to allow GPIOs to be used as
168 normal in sandbox, perhaps with test code actually driving the
169 behaviour of those GPIOs.
170
171config SANDBOX_GPIO_COUNT
172 int "Number of sandbox GPIOs"
173 depends on SANDBOX_GPIO
174 default 128
175 help
176 The sandbox driver can support any number of GPIOs. Generally these
177 are specified using the device tree. But you can also have a number
178 of 'anonymous' GPIOs that do not belong to any device or bank.
179 Select a suitable value depending on your needs.
Bhuvanchandra DVd348a942015-06-01 18:37:16 +0530[diff] [blame]180
Simon Glass90d99e52017-08-04 16:34:54 -0600[diff] [blame]181config CMD_TCA642X
182 bool "tca642x - Command to access tca642x state"
183 help
184 DEPRECATED - This needs conversion to driver model
185
186 This provides a way to looking at the pin state of this device.
187 This mirrors the 'gpio' command and that should be used in preference
188 to custom code.
189
Stephen Warren601800b2016-05-12 12:07:41 -0600[diff] [blame]190config TEGRA_GPIO
191 bool "Tegra20..210 GPIO driver"
192 depends on DM_GPIO
193 help
194 Support for the GPIO controller contained in NVIDIA Tegra20 through
195 Tegra210.
196
Stephen Warren074a1fd2016-05-25 14:38:51 -0600[diff] [blame]197config TEGRA186_GPIO
198 bool "Tegra186 GPIO driver"
199 depends on DM_GPIO
200 help
201 Support for the GPIO controller contained in NVIDIA Tegra186. This
202 covers both the "main" and "AON" controller instances, even though
203 they have slightly different register layout.
204
Masahiro Yamadab9a66b62016-02-16 17:03:48 +0900[diff] [blame]205config GPIO_UNIPHIER
206 bool "UniPhier GPIO"
207 depends on ARCH_UNIPHIER
208 help
209 Say yes here to support UniPhier GPIOs.
210
Bhuvanchandra DVd348a942015-06-01 18:37:16 +0530[diff] [blame]211config VYBRID_GPIO
212 bool "Vybrid GPIO driver"
213 depends on DM
214 default n
215 help
216 Say yes here to support Vybrid vf610 GPIOs.
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +0900[diff] [blame]217
Purna Chandra Mandal386d9342016-01-28 15:30:13 +0530[diff] [blame]218config PIC32_GPIO
219 bool "Microchip PIC32 GPIO driver"
220 depends on DM_GPIO && MACH_PIC32
221 default y
222 help
223 Say yes here to support Microchip PIC32 GPIOs.
224
Vikas Manocha77417102017-04-10 15:02:57 -0700[diff] [blame]225config STM32F7_GPIO
226 bool "ST STM32 GPIO driver"
227 depends on DM_GPIO && STM32
228 default y
229 help
230 Device model driver support for STM32 GPIO controller. It should be
231 usable on many stm32 families like stm32f4 & stm32H7.
232 Tested on STM32F7.
233
Stefan Roese704d9a62016-02-12 13:46:50 +0100[diff] [blame]234config MVEBU_GPIO
235 bool "Marvell MVEBU GPIO driver"
236 depends on DM_GPIO && ARCH_MVEBU
237 default y
238 help
239 Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
240
Siva Durga Prasad Paladugu2978ae22016-03-10 16:27:39 +0530[diff] [blame]241config ZYNQ_GPIO
242 bool "Zynq GPIO driver"
Siva Durga Prasad Paladugu251ab062016-03-10 16:27:44 +0530[diff] [blame]243 depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP)
Siva Durga Prasad Paladugu2978ae22016-03-10 16:27:39 +0530[diff] [blame]244 default y
245 help
246 Supports GPIO access on Zynq SoC.
247
Peng Fan9300f712016-05-03 10:02:23 +0800[diff] [blame]248config DM_74X164
249 bool "74x164 serial-in/parallel-out 8-bits shift register"
250 depends on DM_GPIO
251 help
252 Driver for 74x164 compatible serial-in/parallel-out 8-outputs
253 shift registers, such as 74lv165, 74hc595.
254 This driver can be used to provide access to more gpio outputs.
255
Peng Fan03773432016-04-14 21:45:06 +0800[diff] [blame]256config DM_PCA953X
257 bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
258 depends on DM_GPIO
259 help
260 Say yes here to provide access to several register-oriented
261 SMBus I/O expanders, made mostly by NXP or TI. Compatible
262 models include:
263
264 4 bits: pca9536, pca9537
265
266 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
267 pca9556, pca9557, pca9574, tca6408, xra1202
268
269 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
270 tca6416
271
272 24 bits: tca6424
273
274 40 bits: pca9505, pca9698
275
276 Now, max 24 bits chips and PCA953X compatible chips are
277 supported
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200[diff] [blame]278
Mario Six3c216832018-01-15 11:07:48 +0100[diff] [blame]279config MPC8XXX_GPIO
280 bool "Freescale MPC8XXX GPIO driver"
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200[diff] [blame]281 depends on DM_GPIO
282 help
Mario Six3c216832018-01-15 11:07:48 +0100[diff] [blame]283 This driver supports the built-in GPIO controller of MPC8XXX CPUs.
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200[diff] [blame]284 Each GPIO bank is identified by its own entry in the device tree,
285 i.e.
286
287 gpio-controller@fc00 {
288 #gpio-cells = <2>;
289 compatible = "fsl,pq3-gpio";
290 reg = <0xfc00 0x100>
291 }
292
293 By default, each bank is assumed to have 32 GPIOs, but the ngpios
294 setting is honored, so the number of GPIOs for each bank is
295 configurable to match the actual GPIO count of the SoC (e.g. the
296 32/32/23 banks of the P1022 SoC).
297
mario.six@gdsys.cc51781782016-05-25 15:15:22 +0200[diff] [blame]298 Aside from the standard functions of input/output mode, and output
299 value setting, the open-drain feature, which can configure individual
300 GPIOs to work as open-drain outputs, is supported.
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +0900[diff] [blame]301endmenu