Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 |
| 4 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
| 5 | * |
| 6 | * Based on: |
| 7 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 8 | * |
| 9 | * Configuration settings for the Freescale i.MX6DL aristainetos2 board. |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 10 | */ |
| 11 | #ifndef __ARISTAINETOS2B_CONFIG_H |
| 12 | #define __ARISTAINETOS2B_CONFIG_H |
| 13 | |
| 14 | #define CONFIG_SYS_BOARD_VERSION 3 |
Mario Six | 5bc0543 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 15 | #define CONFIG_HOSTNAME "aristainetos2" |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 16 | #define CONFIG_BOARDNAME "aristainetos2-revB" |
| 17 | |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 18 | #define CONFIG_MXC_UART_BASE UART2_BASE |
Simon Glass | 12ca05a | 2016-10-17 20:12:39 -0600 | [diff] [blame] | 19 | #define CONSOLE_DEV "ttymxc1" |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 20 | |
| 21 | #define CONFIG_FEC_XCV_TYPE RGMII |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 22 | |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 23 | #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ |
| 24 | "board_type=aristainetos2_7@1\0" \ |
| 25 | "nor_bootdelay=-2\0" \ |
| 26 | "mtdids=nand0=gpmi-nand,nor0=spi0.0\0" \ |
| 27 | "mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \ |
| 28 | "-(rescue-system);gpmi-nand:-(ubi)\0" \ |
| 29 | "addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \ |
| 30 | "ubiargs=setenv bootargs console=${console},${baudrate} " \ |
| 31 | "ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " \ |
| 32 | "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \ |
| 33 | "ubifsload ${fit_addr_r} /boot/system.itb; " \ |
| 34 | "imi ${fit_addr_r}\0 " \ |
| 35 | |
| 36 | #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ |
| 37 | |
| 38 | #define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) |
| 39 | #define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(1, 0) |
| 40 | #define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15) |
| 41 | |
| 42 | /* Framebuffer */ |
| 43 | #define CONFIG_SYS_LDB_CLOCK 33246000 |
| 44 | #define CONFIG_LG4573 |
| 45 | #define CONFIG_LG4573_BUS 0 |
| 46 | #define CONFIG_LG4573_CS 1 |
| 47 | |
Heiko Schocher | 9627084 | 2015-08-24 11:36:40 +0200 | [diff] [blame] | 48 | #define CONFIG_PWM_IMX |
| 49 | #define CONFIG_IMX6_PWM_PER_CLK 66000000 |
| 50 | |
| 51 | #include "aristainetos-common.h" |
| 52 | |
| 53 | #endif /* __ARISTAINETOS2B_CONFIG_H */ |