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Heiko Schocher0f8bc282013-12-02 07:47:22 +01001/*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
23
Heiko Schocherd0b37232014-10-01 07:26:06 +020024#define CONFIG_SYS_GENERIC_BOARD
25
Heiko Schocher389aee82014-11-18 09:41:57 +010026#if defined(CONFIG_SPL_BUILD)
27#define CONFIG_SYS_THUMB_BUILD
28#define CONFIG_SYS_ICACHE_OFF
29#define CONFIG_SYS_DCACHE_OFF
30#endif
Heiko Schocher0f8bc282013-12-02 07:47:22 +010031/*
32 * Warning: changing CONFIG_SYS_TEXT_BASE requires
33 * adapting the initial boot program.
34 * Since the linker has to swallow that define, we must use a pure
35 * hex number here!
36 */
37
38
Heiko Schocher237e3792014-10-31 08:31:05 +010039#define CONFIG_SYS_TEXT_BASE 0x21000000
Heiko Schocher0f8bc282013-12-02 07:47:22 +010040
41/* ARM asynchronous clock */
42#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
43#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010044
45/* Misc CPU related */
46#define CONFIG_ARCH_CPU_INIT
47#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48#define CONFIG_SETUP_MEMORY_TAGS
49#define CONFIG_INITRD_TAG
50#define CONFIG_SKIP_LOWLEVEL_INIT
51#define CONFIG_BOARD_EARLY_INIT_F
52#define CONFIG_DISPLAY_CPUINFO
53
54#define CONFIG_CMD_BOOTZ
55#define CONFIG_OF_LIBFDT
56
57/* general purpose I/O */
58#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
59#define CONFIG_AT91_GPIO
60#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
61
62/* serial console */
63#define CONFIG_ATMEL_USART
64#define CONFIG_USART_BASE ATMEL_BASE_DBGU
65#define CONFIG_USART_ID ATMEL_ID_SYS
66#define CONFIG_BAUDRATE 115200
67
68#define CONFIG_BOOTDELAY 3
69
70/*
71 * Command line configuration.
72 */
73#include <config_cmd_default.h>
74#undef CONFIG_CMD_BDI
75#undef CONFIG_CMD_FPGA
76#undef CONFIG_CMD_IMI
77#undef CONFIG_CMD_IMLS
78#undef CONFIG_CMD_LOADS
79#undef CONFIG_CMD_SOURCE
80
81#define CONFIG_CMD_PING
82#define CONFIG_CMD_DHCP
83#define CONFIG_CMD_NAND
84
85/*
86 * SDRAM: 1 bank, min 32, max 128 MB
87 * Initialized before u-boot gets started.
88 */
89#define CONFIG_NR_DRAM_BANKS 1
90#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
91#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
92
93/*
94 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
95 * leaving the correct space for initial global data structure above
96 * that address while providing maximum stack area below.
97 */
98# define CONFIG_SYS_INIT_SP_ADDR \
99 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
100
101/* NAND flash */
102#ifdef CONFIG_CMD_NAND
103#define CONFIG_NAND_ATMEL
104#define CONFIG_SYS_MAX_NAND_DEVICE 1
105#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
106#define CONFIG_SYS_NAND_DBW_8
107#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
108#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
109#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
110#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
111#endif
112
113/* NOR flash - no real flash on this board */
114#define CONFIG_SYS_NO_FLASH 1
115
116/* Ethernet */
117#define CONFIG_MACB
118#define CONFIG_RMII
119#define CONFIG_AT91_WANTS_COMMON_PHY
120
Heiko Schocherf6241622015-01-21 08:38:23 +0100121#define CONFIG_AT91SAM9_WATCHDOG
122#if !defined(CONFIG_SPL_BUILD)
123/* Enable the watchdog */
124#define CONFIG_HW_WATCHDOG
125#endif
126
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100127/* USB */
128#if defined(CONFIG_BOARD_TAURUS)
129#define CONFIG_USB_ATMEL
130#define CONFIG_USB_OHCI_NEW
131#define CONFIG_SYS_USB_OHCI_CPU_INIT
132#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
133#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
134#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
135#define CONFIG_USB_STORAGE
136#endif
137
Heiko Schocher50921cd2014-10-31 08:30:56 +0100138/* SPI EEPROM */
139#define CONFIG_SPI
140#define CONFIG_CMD_SPI
141#define CONFIG_CMD_SF
142#define CONFIG_SPI_FLASH
143#define CONFIG_ATMEL_SPI
144#define CONFIG_SPI_FLASH_STMICRO
145#define TAURUS_SPI_MASK (1 << 4)
146#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
147
Heiko Schochera1655bb2014-11-18 09:41:58 +0100148#if defined(CONFIG_SPL_BUILD)
149/* SPL related */
150#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
151#define CONFIG_SPL_SPI_SUPPORT
152#define CONFIG_SPL_SPI_FLASH_SUPPORT
153#define CONFIG_SPL_SPI_LOAD
154#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
155
156#define CONFIG_SF_DEFAULT_BUS 0
157#define CONFIG_SF_DEFAULT_SPEED 10000000
158#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
159#endif
160
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100161/* load address */
162#define CONFIG_SYS_LOAD_ADDR 0x22000000
163
164/* bootstrap in spi flash , u-boot + env + linux in nandflash */
165#define CONFIG_ENV_IS_IN_NAND
166#define CONFIG_ENV_OFFSET 0x100000
167#define CONFIG_ENV_OFFSET_REDUND 0x180000
168#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
169#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
170#define CONFIG_BOOTARGS \
171 "console=ttyS0,115200 earlyprintk " \
172 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
173 "256k(env),256k(env_redundant),256k(spare)," \
174 "512k(dtb),6M(kernel)ro,-(rootfs) " \
175 "root=/dev/mtdblock7 rw rootfstype=jffs2"
176
177#define CONFIG_SYS_PROMPT "U-Boot> "
178#define CONFIG_SYS_CBSIZE 256
179#define CONFIG_SYS_MAXARGS 16
180#define CONFIG_SYS_PBSIZE \
181 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
182#define CONFIG_SYS_LONGHELP
183#define CONFIG_CMDLINE_EDITING
184#define CONFIG_AUTO_COMPLETE
185
186/*
187 * Size of malloc() pool
188 */
189#define CONFIG_SYS_MALLOC_LEN \
190 ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
191
Heiko Schocher237e3792014-10-31 08:31:05 +0100192/* Defines for SPL */
193#define CONFIG_SPL_FRAMEWORK
194#define CONFIG_SPL_TEXT_BASE 0x0
Heiko Schochera1655bb2014-11-18 09:41:58 +0100195#define CONFIG_SPL_MAX_SIZE (14 * 1024)
Heiko Schocher237e3792014-10-31 08:31:05 +0100196#define CONFIG_SPL_STACK (16 * 1024)
Heiko Schochera1655bb2014-11-18 09:41:58 +0100197#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
198 CONFIG_SYS_MALLOC_LEN)
199#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
Heiko Schocher237e3792014-10-31 08:31:05 +0100200
201#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
202#define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024)
203
204#define CONFIG_SPL_LIBCOMMON_SUPPORT
205#define CONFIG_SPL_LIBGENERIC_SUPPORT
206#define CONFIG_SPL_SERIAL_SUPPORT
207
208#define CONFIG_SPL_BOARD_INIT
209#define CONFIG_SPL_GPIO_SUPPORT
210#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
211#define CONFIG_SPL_NAND_SUPPORT
212#define CONFIG_SYS_USE_NANDFLASH 1
213#define CONFIG_SPL_NAND_DRIVERS
214#define CONFIG_SPL_NAND_BASE
215#define CONFIG_SPL_NAND_ECC
216#define CONFIG_SPL_NAND_RAW_ONLY
217#define CONFIG_SPL_NAND_SOFTECC
218#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
219#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
220#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
221#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
222#define CONFIG_SYS_NAND_5_ADDR_CYCLE
223
224#define CONFIG_SYS_NAND_SIZE (256*1024*1024)
225#define CONFIG_SYS_NAND_PAGE_SIZE 2048
226#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
227#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
228 CONFIG_SYS_NAND_PAGE_SIZE)
229#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
230#define CONFIG_SYS_NAND_ECCSIZE 256
231#define CONFIG_SYS_NAND_ECCBYTES 3
232#define CONFIG_SYS_NAND_OOBSIZE 64
233#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
234 48, 49, 50, 51, 52, 53, 54, 55, \
235 56, 57, 58, 59, 60, 61, 62, 63, }
236
237
238#define CONFIG_SPL_ATMEL_SIZE
239#define CONFIG_SYS_MASTER_CLOCK 132096000
240#define AT91_PLL_LOCK_TIMEOUT 1000000
241#define CONFIG_SYS_AT91_PLLA 0x202A3F01
242#define CONFIG_SYS_MCKR 0x1300
243#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
244#define CONFIG_SYS_AT91_PLLB 0x10193F05
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100245#endif