| Andy Fleming | 9082eea | 2011-04-07 21:56:05 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * National Semiconductor PHY drivers |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation; either version 2 of |
| 7 | * the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 17 | * MA 02111-1307 USA |
| 18 | * |
| 19 | * Copyright 2010-2011 Freescale Semiconductor, Inc. |
| 20 | * author Andy Fleming |
| 21 | * |
| 22 | */ |
| 23 | #include <phy.h> |
| 24 | |
| 25 | /* DP83865 Link and Auto-Neg Status Register */ |
| 26 | #define MIIM_DP83865_LANR 0x11 |
| 27 | #define MIIM_DP83865_SPD_MASK 0x0018 |
| 28 | #define MIIM_DP83865_SPD_1000 0x0010 |
| 29 | #define MIIM_DP83865_SPD_100 0x0008 |
| 30 | #define MIIM_DP83865_DPX_FULL 0x0002 |
| 31 | |
| 32 | |
| 33 | /* NatSemi DP83865 */ |
| 34 | static int dp83865_config(struct phy_device *phydev) |
| 35 | { |
| 36 | phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); |
| 37 | genphy_config_aneg(phydev); |
| 38 | |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | static int dp83865_parse_status(struct phy_device *phydev) |
| 43 | { |
| 44 | int mii_reg; |
| 45 | |
| 46 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_DP83865_LANR); |
| 47 | |
| 48 | switch (mii_reg & MIIM_DP83865_SPD_MASK) { |
| 49 | |
| 50 | case MIIM_DP83865_SPD_1000: |
| 51 | phydev->speed = SPEED_1000; |
| 52 | break; |
| 53 | |
| 54 | case MIIM_DP83865_SPD_100: |
| 55 | phydev->speed = SPEED_100; |
| 56 | break; |
| 57 | |
| 58 | default: |
| 59 | phydev->speed = SPEED_10; |
| 60 | break; |
| 61 | |
| 62 | } |
| 63 | |
| 64 | if (mii_reg & MIIM_DP83865_DPX_FULL) |
| 65 | phydev->duplex = DUPLEX_FULL; |
| 66 | else |
| 67 | phydev->duplex = DUPLEX_HALF; |
| 68 | |
| 69 | return 0; |
| 70 | } |
| 71 | |
| 72 | static int dp83865_startup(struct phy_device *phydev) |
| 73 | { |
| 74 | genphy_update_link(phydev); |
| 75 | dp83865_parse_status(phydev); |
| 76 | |
| 77 | return 0; |
| 78 | } |
| 79 | |
| 80 | |
| 81 | static struct phy_driver DP83865_driver = { |
| 82 | .name = "NatSemi DP83865", |
| 83 | .uid = 0x20005c70, |
| 84 | .mask = 0xfffffff0, |
| 85 | .features = PHY_GBIT_FEATURES, |
| 86 | .config = &dp83865_config, |
| 87 | .startup = &dp83865_startup, |
| 88 | .shutdown = &genphy_shutdown, |
| 89 | }; |
| 90 | |
| 91 | int phy_natsemi_init(void) |
| 92 | { |
| 93 | phy_register(&DP83865_driver); |
| 94 | |
| 95 | return 0; |
| 96 | } |