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Marcel Ziswiler7ce134b72019-05-31 18:56:39 +03001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2019 Toradex
4 */
5
6#ifndef __COLIBRI_IMX8X_H
7#define __COLIBRI_IMX8X_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
Simon Glass1af3c7f2020-05-10 11:40:09 -060011#include <linux/stringify.h>
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030012
Tom Rini6cc04542022-10-28 20:27:13 -040013#define CFG_SYS_FSL_ESDHC_ADDR 0
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030014#define USDHC1_BASE_ADDR 0x5b010000
15#define USDHC2_BASE_ADDR 0x5b020000
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030016
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030017#define CONFIG_IPADDR 192.168.10.2
18#define CONFIG_NETMASK 255.255.255.0
19#define CONFIG_SERVERIP 192.168.10.1
20
21#define MEM_LAYOUT_ENV_SETTINGS \
22 "fdt_addr_r=0x83000000\0" \
23 "kernel_addr_r=0x81000000\0" \
24 "ramdisk_addr_r=0x83800000\0" \
25 "scriptaddr=0x80800000\0"
26
27#ifdef CONFIG_AHAB_BOOT
28#define AHAB_ENV "sec_boot=yes\0"
29#else
30#define AHAB_ENV "sec_boot=no\0"
31#endif
32
33/* Boot M4 */
34#define M4_BOOT_ENV \
35 "m4_0_image=m4_0.bin\0" \
36 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
37 "${m4_0_image}\0" \
38 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
39
40#define MFG_NAND_PARTITION ""
41
42#define BOOT_TARGET_DEVICES(func) \
43 func(MMC, mmc, 1) \
44 func(MMC, mmc, 0) \
45 func(DHCP, dhcp, na)
46#include <config_distro_bootcmd.h>
47#undef BOOTENV_RUN_NET_USB_START
48#define BOOTENV_RUN_NET_USB_START ""
49
50#define CONFIG_MFG_ENV_SETTINGS \
Oleksandr Suvorov506619d2020-06-16 22:20:01 +030051 "mfgtool_args=setenv bootargs ${consoleargs} " \
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030052 "rdinit=/linuxrc g_mass_storage.stall=0 " \
53 "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \
54 "g_mass_storage.idProduct=0x37FF " \
55 "g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \
56 "${vidargs} clk_ignore_unused\0" \
57 "initrd_addr=0x83800000\0" \
58 "initrd_high=0xffffffff\0" \
59 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \
60 "${fdt_addr};\0" \
61
62/* Initial environment variables */
63#define CONFIG_EXTRA_ENV_SETTINGS \
64 AHAB_ENV \
65 BOOTENV \
66 CONFIG_MFG_ENV_SETTINGS \
67 M4_BOOT_ENV \
68 MEM_LAYOUT_ENV_SETTINGS \
Igor Opaniuk848ba632019-08-23 20:00:48 +030069 "boot_file=Image\0" \
Igor Opaniuk1377a772022-04-13 11:33:27 +020070 "boot_script_dhcp=boot.scr\0" \
Oleksandr Suvorov506619d2020-06-16 22:20:01 +030071 "consoleargs=console=ttyLP3,${baudrate} earlycon\0" \
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030072 "fdt_addr=0x83000000\0" \
73 "fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
74 "fdtfile=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
75 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
76 "image=Image\0" \
77 "initrd_addr=0x83800000\0" \
78 "initrd_high=0xffffffffffffffff\0" \
Oleksandr Suvorov506619d2020-06-16 22:20:01 +030079 "mmcargs=setenv bootargs ${consoleargs} " \
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030080 "root=PARTUUID=${uuid} rootwait " \
81 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
Tom Rinide35b8f2021-12-11 14:55:52 -050082 "mmcpart=1\0" \
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030083 "panel=NULL\0" \
84 "script=boot.scr\0" \
85 "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \
86 "if test \"$confirm\" = \"y\"; then " \
87 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
88 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \
89 "${blkcnt}; fi\0" \
90 "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0"
91
92/* Link Definitions */
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030093
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030094/* Environment in eMMC, before config block at the end of 1st "boot sector" */
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030095
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030096/* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
Tom Rini6cc04542022-10-28 20:27:13 -040097#define CFG_SYS_FSL_USDHC_NUM 2
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030098
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +030099#define CONFIG_SYS_SDRAM_BASE 0x80000000
100#define PHYS_SDRAM_1 0x80000000
101#define PHYS_SDRAM_2 0x880000000
102#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
103#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
104
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +0300105/* Generic Timer Definitions */
Marcel Ziswiler7ce134b72019-05-31 18:56:39 +0300106
107#define BOOTAUX_RESERVED_MEM_BASE 0x88000000
108#define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */
109
110#endif /* __COLIBRI_IMX8X_H */