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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Nandor Handa5337a2017-11-08 15:35:14 +00002/*
3 * SII Semiconductor Corporation S35392A RTC driver.
4 *
5 * Copyright (c) 2017, General Electric Company
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
Nandor Handa5337a2017-11-08 15:35:14 +000018 */
19
20#include <command.h>
21#include <common.h>
22#include <dm.h>
23#include <i2c.h>
24#include <linux/bitrev.h>
25#include <rtc.h>
26
27#define S35390A_CMD_STATUS1 0x30
28#define S35390A_CMD_STATUS2 0x31
29#define S35390A_CMD_TIME1 0x32
30#define S35390A_CMD_TIME2 0x33
31#define S35390A_CMD_INT2_REG1 0x35
32
33#define S35390A_BYTE_YEAR 0
34#define S35390A_BYTE_MONTH 1
35#define S35390A_BYTE_DAY 2
36#define S35390A_BYTE_WDAY 3
37#define S35390A_BYTE_HOURS 4
38#define S35390A_BYTE_MINS 5
39#define S35390A_BYTE_SECS 6
40
41/* flags for STATUS1 */
42#define S35390A_FLAG_POC 0x01
43#define S35390A_FLAG_BLD 0x02
44#define S35390A_FLAG_INT2 0x04
45#define S35390A_FLAG_24H 0x40
46#define S35390A_FLAG_RESET 0x80
47
48/*
49 * If either BLD or POC is set, then the chip has lost power long enough for
50 * the time value to become invalid.
51 */
52#define S35390A_LOW_VOLTAGE (S35390A_FLAG_POC | S35390A_FLAG_BLD)
53
54/*---------------------------------------------------------------------*/
55#undef DEBUG_RTC
56
57#ifdef DEBUG_RTC
58#define DEBUGR(fmt, args...) printf(fmt, ##args)
59#else
60#define DEBUGR(fmt, args...)
61#endif
62/*---------------------------------------------------------------------*/
63
64#ifdef CONFIG_DM_RTC
65#define DEV_TYPE struct udevice
66#else
67/* Local udevice */
68struct ludevice {
69 u8 chip;
70};
71
72#define DEV_TYPE struct ludevice
73struct ludevice dev;
74
75#endif
76
77#define msleep(a) udelay(a * 1000)
78
79int lowvoltage;
80
81static int s35392a_rtc_reset(DEV_TYPE *dev);
82
83static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
84{
85 int ret;
86
87#ifdef CONFIG_DM_RTC
88 /* TODO: we need to tweak the chip address to reg */
89 ret = dm_i2c_read(dev, 0, buf, len);
90#else
91 (void)dev;
92 ret = i2c_read(reg, 0, -1, buf, len);
93#endif
94
95 return ret;
96}
97
98static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len)
99{
100 int ret;
101
102#ifdef CONFIG_DM_RTC
103 /* TODO: we need to tweak the chip address to reg */
104 ret = dm_i2c_write(dev, 0, buf, 1);
105#else
106 (void)dev;
107 ret = i2c_write(reg, 0, 0, buf, len);
108#endif
109
110 return ret;
111}
112
113static int s35392a_rtc_read8(DEV_TYPE *dev, unsigned int reg)
114{
115 u8 val;
116 int ret;
117
118 ret = s35392a_rtc_read(dev, reg, &val, sizeof(val));
119 return ret < 0 ? ret : val;
120}
121
122static int s35392a_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val)
123{
124 int ret;
125 u8 lval = val;
126
127 ret = s35392a_rtc_write(dev, reg, &lval, sizeof(lval));
128 return ret < 0 ? ret : 0;
129}
130
131static int validate_time(const struct rtc_time *tm)
132{
133 if ((tm->tm_year < 2000) || (tm->tm_year > 2099))
134 return -EINVAL;
135
136 if ((tm->tm_mon < 1) || (tm->tm_mon > 12))
137 return -EINVAL;
138
139 if ((tm->tm_mday < 1) || (tm->tm_mday > 31))
140 return -EINVAL;
141
142 if ((tm->tm_wday < 0) || (tm->tm_wday > 6))
143 return -EINVAL;
144
145 if ((tm->tm_hour < 0) || (tm->tm_hour > 23))
146 return -EINVAL;
147
148 if ((tm->tm_min < 0) || (tm->tm_min > 59))
149 return -EINVAL;
150
151 if ((tm->tm_sec < 0) || (tm->tm_sec > 59))
152 return -EINVAL;
153
154 return 0;
155}
156
157void s35392a_rtc_init(DEV_TYPE *dev)
158{
159 int status;
160
161 status = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
162 if (status < 0)
163 goto error;
164
165 DEBUGR("init: S35390A_CMD_STATUS1: 0x%x\n", status);
166
167 lowvoltage = status & S35390A_LOW_VOLTAGE ? 1 : 0;
168
169 if (status & S35390A_FLAG_POC)
170 /*
171 * Do not communicate for 0.5 seconds since the power-on
172 * detection circuit is in operation.
173 */
174 msleep(500);
175
176 else if (!lowvoltage)
177 /*
178 * If both POC and BLD are unset everything is fine.
179 */
180 return;
181
182 if (lowvoltage)
183 printf("RTC low voltage detected\n");
184
185 if (!s35392a_rtc_reset(dev))
186 return;
187
188error:
189 printf("Error RTC init.\n");
190}
191
192/* Get the current time from the RTC */
193static int s35392a_rtc_get(DEV_TYPE *dev, struct rtc_time *tm)
194{
195 u8 date[7];
196 int ret, i;
197
198 if (lowvoltage) {
199 DEBUGR("RTC low voltage detected\n");
200 return -EINVAL;
201 }
202
203 ret = s35392a_rtc_read(dev, S35390A_CMD_TIME1, date, sizeof(date));
204 if (ret < 0) {
205 DEBUGR("Error reading date from RTC\n");
206 return -EIO;
207 }
208
209 /* This chip returns the bits of each byte in reverse order */
210 for (i = 0; i < 7; ++i)
211 date[i] = bitrev8(date[i]);
212
213 tm->tm_sec = bcd2bin(date[S35390A_BYTE_SECS]);
214 tm->tm_min = bcd2bin(date[S35390A_BYTE_MINS]);
215 tm->tm_hour = bcd2bin(date[S35390A_BYTE_HOURS] & ~S35390A_FLAG_24H);
216 tm->tm_wday = bcd2bin(date[S35390A_BYTE_WDAY]);
217 tm->tm_mday = bcd2bin(date[S35390A_BYTE_DAY]);
218 tm->tm_mon = bcd2bin(date[S35390A_BYTE_MONTH]);
219 tm->tm_year = bcd2bin(date[S35390A_BYTE_YEAR]) + 2000;
220
221 DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
222 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
223 tm->tm_hour, tm->tm_min, tm->tm_sec);
224
225 return 0;
226}
227
228/* Set the RTC */
229static int s35392a_rtc_set(DEV_TYPE *dev, const struct rtc_time *tm)
230{
231 int i, ret;
232 int status;
233 u8 date[7];
234
235 DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
236 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
237 tm->tm_hour, tm->tm_min, tm->tm_sec);
238
239 ret = validate_time(tm);
240 if (ret < 0)
241 return -EINVAL;
242
243 /* We support only 24h mode */
244 ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
245 if (ret < 0)
246 return -EIO;
247 status = ret;
248
249 ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1,
250 status | S35390A_FLAG_24H);
251 if (ret < 0)
252 return -EIO;
253
254 date[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 2000);
255 date[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon);
256 date[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday);
257 date[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday);
258 date[S35390A_BYTE_HOURS] = bin2bcd(tm->tm_hour);
259 date[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min);
260 date[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec);
261
262 /* This chip expects the bits of each byte to be in reverse order */
263 for (i = 0; i < 7; ++i)
264 date[i] = bitrev8(date[i]);
265
266 ret = s35392a_rtc_write(dev, S35390A_CMD_TIME1, date, sizeof(date));
267 if (ret < 0) {
268 DEBUGR("Error writing date to RTC\n");
269 return -EIO;
270 }
271
272 /* Now we have time. Reset the low voltage status */
273 lowvoltage = 0;
274
275 return 0;
276}
277
278/* Reset the RTC. */
279static int s35392a_rtc_reset(DEV_TYPE *dev)
280{
281 int buf;
282 int ret;
283 unsigned int initcount = 0;
284
285 buf = S35390A_FLAG_RESET;
286
287initialize:
288 ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, buf);
289 if (ret < 0)
290 return -EIO;
291
292 ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1);
293 if (ret < 0)
294 return -EIO;
295 buf = ret;
296
297 if (!lowvoltage)
298 lowvoltage = buf & S35390A_LOW_VOLTAGE ? 1 : 0;
299
300 if (buf & S35390A_LOW_VOLTAGE) {
301 /* Try up to five times to reset the chip */
302 if (initcount < 5) {
303 ++initcount;
304 goto initialize;
305 } else {
306 return -EIO;
307 }
308 }
309
310 return 0;
311}
312
313#ifndef CONFIG_DM_RTC
314
315int rtc_get(struct rtc_time *tm)
316{
317 return s35392a_rtc_get(&dev, tm);
318}
319
320int rtc_set(struct rtc_time *tm)
321{
322 return s35392a_rtc_set(&dev, tm);
323}
324
325void rtc_reset(void)
326{
327 s35392a_rtc_reset(&dev);
328}
329
330void rtc_init(void)
331{
332 s35392a_rtc_init(&dev);
333}
334
335#else
336
337static int s35392a_probe(struct udevice *dev)
338{
339 s35392a_rtc_init(dev);
340 return 0;
341}
342
343static const struct rtc_ops s35392a_rtc_ops = {
344 .get = s35392a_rtc_get,
345 .set = s35392a_rtc_set,
346 .read8 = s35392a_rtc_read8,
347 .write8 = s35392a_rtc_write8,
348 .reset = s35392a_rtc_reset,
349};
350
351static const struct udevice_id s35392a_rtc_ids[] = {
352 { .compatible = "sii,s35392a-rtc" },
353 { }
354};
355
356U_BOOT_DRIVER(s35392a_rtc) = {
357 .name = "s35392a_rtc",
358 .id = UCLASS_RTC,
359 .probe = s35392a_probe,
360 .of_match = s35392a_rtc_ids,
361 .ops = &s35392a_rtc_ops,
362};
363
364#endif