Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: ARM PrimeCell MultiMedia Card Interface (MMCI) PL180 and PL181 |
| 8 | |
| 9 | maintainers: |
| 10 | - Linus Walleij <linus.walleij@linaro.org> |
| 11 | - Ulf Hansson <ulf.hansson@linaro.org> |
| 12 | |
| 13 | description: |
| 14 | The ARM PrimeCells MMCI PL180 and PL181 provides an interface for |
| 15 | reading and writing to MultiMedia and SD cards alike. Over the years |
| 16 | vendors have use the VHDL code from ARM to create derivative MMC/SD/SDIO |
| 17 | host controllers with very similar characteristics. |
| 18 | |
| 19 | allOf: |
| 20 | - $ref: /schemas/arm/primecell.yaml# |
| 21 | - $ref: mmc-controller.yaml# |
| 22 | |
| 23 | # We need a select here so we don't match all nodes with 'arm,primecell' |
| 24 | select: |
| 25 | properties: |
| 26 | compatible: |
| 27 | contains: |
| 28 | enum: |
| 29 | - arm,pl180 |
| 30 | - arm,pl181 |
| 31 | - arm,pl18x |
| 32 | required: |
| 33 | - compatible |
| 34 | |
| 35 | properties: |
| 36 | compatible: |
| 37 | oneOf: |
| 38 | - description: The first version of the block, simply called |
| 39 | PL180 and found in the ARM Integrator IM/PD1 logic module. |
| 40 | items: |
| 41 | - const: arm,pl180 |
| 42 | - const: arm,primecell |
| 43 | - description: The improved version of the block, found in the |
| 44 | ARM Versatile and later reference designs. Further revisions |
| 45 | exist but get detected at runtime by reading some magic numbers |
| 46 | in the PrimeCell ID registers. |
| 47 | items: |
| 48 | - const: arm,pl181 |
| 49 | - const: arm,primecell |
| 50 | - description: Wildcard entry that will let the operating system |
| 51 | inspect the PrimeCell ID registers to determine which hardware |
| 52 | variant of PL180 or PL181 this is. |
| 53 | items: |
| 54 | - const: arm,pl18x |
| 55 | - const: arm,primecell |
| 56 | - description: Entries for STMicroelectronics variant of PL18x. |
| 57 | items: |
| 58 | - enum: |
| 59 | - st,stm32-sdmmc2 |
| 60 | - st,stm32mp25-sdmmc2 |
| 61 | - const: arm,pl18x |
| 62 | - const: arm,primecell |
| 63 | |
| 64 | clocks: |
| 65 | description: One or two clocks, the "apb_pclk" and the "MCLK" |
| 66 | which is the core block clock. The names are not compulsory. |
| 67 | minItems: 1 |
| 68 | maxItems: 2 |
| 69 | |
| 70 | dmas: |
| 71 | maxItems: 2 |
| 72 | |
| 73 | dma-names: |
| 74 | oneOf: |
| 75 | - items: |
| 76 | - const: tx |
| 77 | - const: rx |
| 78 | - items: |
| 79 | - const: rx |
| 80 | - const: tx |
| 81 | |
| 82 | power-domains: true |
| 83 | |
| 84 | resets: |
| 85 | maxItems: 1 |
| 86 | |
| 87 | reg: |
| 88 | description: the MMIO memory window must be exactly 4KB (0x1000) and the |
| 89 | layout should provide the PrimeCell ID registers so that the device can |
| 90 | be discovered. On ST Micro variants, a second register window may be |
| 91 | defined if a delay block is present and used for tuning. |
| 92 | |
| 93 | interrupts: |
| 94 | description: The first interrupt is the command interrupt and corresponds |
| 95 | to the event at the end of a command. The second interrupt is the |
| 96 | PIO (polled I/O) interrupt and occurs when the FIFO needs to be |
| 97 | emptied as part of a bulk read from the card. Some variants have these |
| 98 | two interrupts wired into the same line (logic OR) and in that case |
| 99 | only one interrupt may be provided. The interrupt-names property is |
| 100 | not used due to inconsistency of existing DTs regarding its content. |
| 101 | deprecated: false |
| 102 | minItems: 1 |
| 103 | maxItems: 2 |
| 104 | |
| 105 | st,sig-dir-dat0: |
| 106 | $ref: /schemas/types.yaml#/definitions/flag |
| 107 | description: ST Micro-specific property, bus signal direction pins used for |
| 108 | DAT[0]. |
| 109 | |
| 110 | st,sig-dir-dat2: |
| 111 | $ref: /schemas/types.yaml#/definitions/flag |
| 112 | description: ST Micro-specific property, bus signal direction pins used for |
| 113 | DAT[2]. |
| 114 | |
| 115 | st,sig-dir-dat31: |
| 116 | $ref: /schemas/types.yaml#/definitions/flag |
| 117 | description: ST Micro-specific property, bus signal direction pins used for |
| 118 | DAT[3] and DAT[1]. |
| 119 | |
| 120 | st,sig-dir-dat74: |
| 121 | $ref: /schemas/types.yaml#/definitions/flag |
| 122 | description: ST Micro-specific property, bus signal direction pins used for |
| 123 | DAT[7] and DAT[4]. |
| 124 | |
| 125 | st,sig-dir-cmd: |
| 126 | $ref: /schemas/types.yaml#/definitions/flag |
| 127 | description: ST Micro-specific property, CMD signal direction used for |
| 128 | pin CMD. |
| 129 | |
| 130 | st,sig-pin-fbclk: |
| 131 | $ref: /schemas/types.yaml#/definitions/flag |
| 132 | description: ST Micro-specific property, feedback clock FBCLK signal pin |
| 133 | in use. |
| 134 | |
| 135 | st,sig-dir: |
| 136 | $ref: /schemas/types.yaml#/definitions/flag |
| 137 | description: ST Micro-specific property, signal direction polarity used for |
| 138 | pins CMD, DAT[0], DAT[1], DAT[2] and DAT[3]. |
| 139 | |
| 140 | st,neg-edge: |
| 141 | $ref: /schemas/types.yaml#/definitions/flag |
| 142 | description: ST Micro-specific property, data and command phase relation, |
| 143 | generated on the sd clock falling edge. |
| 144 | |
| 145 | st,use-ckin: |
| 146 | $ref: /schemas/types.yaml#/definitions/flag |
| 147 | description: ST Micro-specific property, use CKIN pin from an external |
| 148 | driver to sample the receive data (for example with a voltage switch |
| 149 | transceiver). |
| 150 | |
| 151 | st,cmd-gpios: |
| 152 | maxItems: 1 |
| 153 | description: |
| 154 | The GPIO matching the CMD pin. |
| 155 | |
| 156 | st,ck-gpios: |
| 157 | maxItems: 1 |
| 158 | description: |
| 159 | The GPIO matching the CK pin. |
| 160 | |
| 161 | st,ckin-gpios: |
| 162 | maxItems: 1 |
| 163 | description: |
| 164 | The GPIO matching the CKIN pin. |
| 165 | |
| 166 | dependencies: |
| 167 | st,cmd-gpios: [ "st,use-ckin" ] |
| 168 | st,ck-gpios: [ "st,use-ckin" ] |
| 169 | st,ckin-gpios: [ "st,use-ckin" ] |
| 170 | |
| 171 | unevaluatedProperties: false |
| 172 | |
| 173 | required: |
| 174 | - compatible |
| 175 | - reg |
| 176 | - interrupts |
| 177 | |
| 178 | examples: |
| 179 | - | |
| 180 | #include <dt-bindings/interrupt-controller/irq.h> |
| 181 | #include <dt-bindings/gpio/gpio.h> |
| 182 | |
| 183 | mmc@5000 { |
| 184 | compatible = "arm,pl180", "arm,primecell"; |
| 185 | reg = <0x5000 0x1000>; |
| 186 | interrupts-extended = <&vic 22 &sic 1>; |
| 187 | clocks = <&xtal24mhz>, <&pclk>; |
| 188 | clock-names = "mclk", "apb_pclk"; |
| 189 | }; |
| 190 | |
| 191 | - | |
| 192 | #include <dt-bindings/interrupt-controller/irq.h> |
| 193 | |
| 194 | mmc@80126000 { |
| 195 | compatible = "arm,pl18x", "arm,primecell"; |
| 196 | reg = <0x80126000 0x1000>; |
| 197 | interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>; |
| 198 | dmas = <&dma 29 0 0x2>, <&dma 29 0 0x0>; |
| 199 | dma-names = "rx", "tx"; |
| 200 | clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>; |
| 201 | clock-names = "sdi", "apb_pclk"; |
| 202 | max-frequency = <100000000>; |
| 203 | bus-width = <4>; |
| 204 | cap-sd-highspeed; |
| 205 | cap-mmc-highspeed; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame^] | 206 | cd-gpios = <&gpio2 31 0x4>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 207 | st,sig-dir-dat0; |
| 208 | st,sig-dir-dat2; |
| 209 | st,sig-dir-cmd; |
| 210 | st,sig-pin-fbclk; |
| 211 | vmmc-supply = <&ab8500_ldo_aux3_reg>; |
| 212 | vqmmc-supply = <&vmmci>; |
| 213 | }; |
| 214 | |
| 215 | - | |
| 216 | mmc@101f6000 { |
| 217 | compatible = "arm,pl18x", "arm,primecell"; |
| 218 | reg = <0x101f6000 0x1000>; |
| 219 | clocks = <&sdiclk>, <&pclksdi>; |
| 220 | clock-names = "mclk", "apb_pclk"; |
| 221 | interrupts = <22>; |
| 222 | max-frequency = <400000>; |
| 223 | bus-width = <4>; |
| 224 | cap-mmc-highspeed; |
| 225 | cap-sd-highspeed; |
| 226 | full-pwr-cycle; |
| 227 | st,sig-dir-dat0; |
| 228 | st,sig-dir-dat2; |
| 229 | st,sig-dir-dat31; |
| 230 | st,sig-dir-cmd; |
| 231 | st,sig-pin-fbclk; |
| 232 | vmmc-supply = <&vmmc_regulator>; |
| 233 | }; |
| 234 | |
| 235 | - | |
| 236 | mmc@52007000 { |
| 237 | compatible = "arm,pl18x", "arm,primecell"; |
| 238 | arm,primecell-periphid = <0x10153180>; |
| 239 | reg = <0x52007000 0x1000>; |
| 240 | interrupts = <49>; |
| 241 | clocks = <&rcc 0>; |
| 242 | clock-names = "apb_pclk"; |
| 243 | resets = <&rcc 1>; |
| 244 | cap-sd-highspeed; |
| 245 | cap-mmc-highspeed; |
| 246 | max-frequency = <120000000>; |
| 247 | }; |