Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> |
| 4 | */ |
| 5 | |
| 6 | #include "imx27-eukrea-cpuimx27.dtsi" |
| 7 | |
| 8 | / { |
| 9 | model = "Eukrea MBIMXSD27"; |
| 10 | compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27"; |
| 11 | |
| 12 | display0: CMO-QVGA { |
| 13 | model = "CMO-QVGA"; |
| 14 | bits-per-pixel = <16>; |
| 15 | fsl,pcr = <0xfad08b80>; |
| 16 | |
| 17 | display-timings { |
| 18 | native-mode = <&timing0>; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame^] | 19 | timing0: timing0 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 20 | clock-frequency = <6500000>; |
| 21 | hactive = <320>; |
| 22 | vactive = <240>; |
| 23 | hback-porch = <20>; |
| 24 | hsync-len = <30>; |
| 25 | hfront-porch = <38>; |
| 26 | vback-porch = <4>; |
| 27 | vsync-len = <3>; |
| 28 | vfront-porch = <15>; |
| 29 | }; |
| 30 | }; |
| 31 | }; |
| 32 | |
| 33 | backlight { |
| 34 | compatible = "gpio-backlight"; |
| 35 | pinctrl-names = "default"; |
| 36 | pinctrl-0 = <&pinctrl_backlight>; |
| 37 | gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; |
| 38 | }; |
| 39 | |
| 40 | leds { |
| 41 | compatible = "gpio-leds"; |
| 42 | pinctrl-names = "default"; |
| 43 | pinctrl-0 = <&pinctrl_gpioleds>; |
| 44 | |
| 45 | led1 { |
| 46 | label = "system::live"; |
| 47 | gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; |
| 48 | linux,default-trigger = "heartbeat"; |
| 49 | }; |
| 50 | |
| 51 | led2 { |
| 52 | label = "system::user"; |
| 53 | gpios = <&gpio6 19 GPIO_ACTIVE_LOW>; |
| 54 | }; |
| 55 | }; |
| 56 | |
| 57 | reg_lcd: regulator-0 { |
| 58 | compatible = "regulator-fixed"; |
| 59 | pinctrl-names = "default"; |
| 60 | pinctrl-0 = <&pinctrl_lcdreg>; |
| 61 | regulator-name = "LCD"; |
| 62 | regulator-min-microvolt = <5000000>; |
| 63 | regulator-max-microvolt = <5000000>; |
| 64 | gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>; |
| 65 | enable-active-high; |
| 66 | }; |
| 67 | }; |
| 68 | |
| 69 | &cspi1 { |
| 70 | pinctrl-0 = <&pinctrl_cspi1>; |
| 71 | cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; |
| 72 | status = "okay"; |
| 73 | |
| 74 | ads7846@0 { |
| 75 | compatible = "ti,ads7846"; |
| 76 | pinctrl-names = "default"; |
| 77 | pinctrl-0 = <&pinctrl_touch>; |
| 78 | reg = <0>; |
| 79 | interrupts = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>; |
| 80 | spi-cpol; |
| 81 | spi-max-frequency = <1500000>; |
| 82 | ti,keep-vref-on; |
| 83 | }; |
| 84 | }; |
| 85 | |
| 86 | &fb { |
| 87 | pinctrl-names = "default"; |
| 88 | pinctrl-0 = <&pinctrl_imxfb>; |
| 89 | display = <&display0>; |
| 90 | lcd-supply = <®_lcd>; |
| 91 | fsl,dmacr = <0x00040060>; |
| 92 | fsl,lscr1 = <0x00120300>; |
| 93 | fsl,lpccr = <0x00a903ff>; |
| 94 | status = "okay"; |
| 95 | }; |
| 96 | |
| 97 | &i2c1 { |
| 98 | codec: codec@1a { |
| 99 | compatible = "ti,tlv320aic23"; |
| 100 | reg = <0x1a>; |
| 101 | }; |
| 102 | }; |
| 103 | |
| 104 | &kpp { |
| 105 | linux,keymap = < |
| 106 | MATRIX_KEY(0, 0, KEY_UP) |
| 107 | MATRIX_KEY(0, 1, KEY_DOWN) |
| 108 | MATRIX_KEY(1, 0, KEY_RIGHT) |
| 109 | MATRIX_KEY(1, 1, KEY_LEFT) |
| 110 | >; |
| 111 | status = "okay"; |
| 112 | }; |
| 113 | |
| 114 | &sdhci1 { |
| 115 | pinctrl-names = "default"; |
| 116 | pinctrl-0 = <&pinctrl_sdhc1>; |
| 117 | bus-width = <4>; |
| 118 | status = "okay"; |
| 119 | }; |
| 120 | |
| 121 | &ssi1 { |
| 122 | pinctrl-names = "default"; |
| 123 | pinctrl-0 = <&pinctrl_ssi1>; |
| 124 | codec-handle = <&codec>; |
| 125 | status = "okay"; |
| 126 | }; |
| 127 | |
| 128 | &uart1 { |
| 129 | uart-has-rtscts; |
| 130 | pinctrl-names = "default"; |
| 131 | pinctrl-0 = <&pinctrl_uart1>; |
| 132 | status = "okay"; |
| 133 | }; |
| 134 | |
| 135 | &uart2 { |
| 136 | uart-has-rtscts; |
| 137 | pinctrl-names = "default"; |
| 138 | pinctrl-0 = <&pinctrl_uart2>; |
| 139 | status = "okay"; |
| 140 | }; |
| 141 | |
| 142 | &uart3 { |
| 143 | uart-has-rtscts; |
| 144 | pinctrl-names = "default"; |
| 145 | pinctrl-0 = <&pinctrl_uart3>; |
| 146 | status = "okay"; |
| 147 | }; |
| 148 | |
| 149 | &iomuxc { |
| 150 | imx27-eukrea-cpuimx27-baseboard { |
| 151 | pinctrl_cspi1: cspi1grp { |
| 152 | fsl,pins = < |
| 153 | MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0 |
| 154 | MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0 |
| 155 | MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0 |
| 156 | MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* CS0 */ |
| 157 | >; |
| 158 | }; |
| 159 | |
| 160 | pinctrl_backlight: backlightgrp { |
| 161 | fsl,pins = < |
| 162 | MX27_PAD_PWMO__GPIO5_5 0x0 |
| 163 | >; |
| 164 | }; |
| 165 | |
| 166 | pinctrl_gpioleds: gpioledsgrp { |
| 167 | fsl,pins = < |
| 168 | MX27_PAD_PC_PWRON__GPIO6_16 0x0 |
| 169 | MX27_PAD_PC_CD2_B__GPIO6_19 0x0 |
| 170 | >; |
| 171 | }; |
| 172 | |
| 173 | pinctrl_imxfb: imxfbgrp { |
| 174 | fsl,pins = < |
| 175 | MX27_PAD_LD0__LD0 0x0 |
| 176 | MX27_PAD_LD1__LD1 0x0 |
| 177 | MX27_PAD_LD2__LD2 0x0 |
| 178 | MX27_PAD_LD3__LD3 0x0 |
| 179 | MX27_PAD_LD4__LD4 0x0 |
| 180 | MX27_PAD_LD5__LD5 0x0 |
| 181 | MX27_PAD_LD6__LD6 0x0 |
| 182 | MX27_PAD_LD7__LD7 0x0 |
| 183 | MX27_PAD_LD8__LD8 0x0 |
| 184 | MX27_PAD_LD9__LD9 0x0 |
| 185 | MX27_PAD_LD10__LD10 0x0 |
| 186 | MX27_PAD_LD11__LD11 0x0 |
| 187 | MX27_PAD_LD12__LD12 0x0 |
| 188 | MX27_PAD_LD13__LD13 0x0 |
| 189 | MX27_PAD_LD14__LD14 0x0 |
| 190 | MX27_PAD_LD15__LD15 0x0 |
| 191 | MX27_PAD_LD16__LD16 0x0 |
| 192 | MX27_PAD_LD17__LD17 0x0 |
| 193 | MX27_PAD_CONTRAST__CONTRAST 0x0 |
| 194 | MX27_PAD_OE_ACD__OE_ACD 0x0 |
| 195 | MX27_PAD_HSYNC__HSYNC 0x0 |
| 196 | MX27_PAD_VSYNC__VSYNC 0x0 |
| 197 | >; |
| 198 | }; |
| 199 | |
| 200 | pinctrl_lcdreg: lcdreggrp { |
| 201 | fsl,pins = < |
| 202 | MX27_PAD_CLS__GPIO1_25 0x0 |
| 203 | >; |
| 204 | }; |
| 205 | |
| 206 | pinctrl_sdhc1: sdhc1grp { |
| 207 | fsl,pins = < |
| 208 | MX27_PAD_SD1_CLK__SD1_CLK 0x0 |
| 209 | MX27_PAD_SD1_CMD__SD1_CMD 0x0 |
| 210 | MX27_PAD_SD1_D0__SD1_D0 0x0 |
| 211 | MX27_PAD_SD1_D1__SD1_D1 0x0 |
| 212 | MX27_PAD_SD1_D2__SD1_D2 0x0 |
| 213 | MX27_PAD_SD1_D3__SD1_D3 0x0 |
| 214 | >; |
| 215 | }; |
| 216 | |
| 217 | pinctrl_ssi1: ssi1grp { |
| 218 | fsl,pins = < |
| 219 | MX27_PAD_SSI4_CLK__SSI4_CLK 0x0 |
| 220 | MX27_PAD_SSI4_FS__SSI4_FS 0x0 |
| 221 | MX27_PAD_SSI4_RXDAT__SSI4_RXDAT 0x1 |
| 222 | MX27_PAD_SSI4_TXDAT__SSI4_TXDAT 0x1 |
| 223 | >; |
| 224 | }; |
| 225 | |
| 226 | pinctrl_touch: touchgrp { |
| 227 | fsl,pins = < |
| 228 | MX27_PAD_CSPI1_RDY__GPIO4_25 0x0 /* IRQ */ |
| 229 | >; |
| 230 | }; |
| 231 | |
| 232 | pinctrl_uart1: uart1grp { |
| 233 | fsl,pins = < |
| 234 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 |
| 235 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 |
| 236 | MX27_PAD_UART1_CTS__UART1_CTS 0x0 |
| 237 | MX27_PAD_UART1_RTS__UART1_RTS 0x0 |
| 238 | >; |
| 239 | }; |
| 240 | |
| 241 | pinctrl_uart2: uart2grp { |
| 242 | fsl,pins = < |
| 243 | MX27_PAD_UART2_TXD__UART2_TXD 0x0 |
| 244 | MX27_PAD_UART2_RXD__UART2_RXD 0x0 |
| 245 | MX27_PAD_UART2_CTS__UART2_CTS 0x0 |
| 246 | MX27_PAD_UART2_RTS__UART2_RTS 0x0 |
| 247 | >; |
| 248 | }; |
| 249 | |
| 250 | pinctrl_uart3: uart3grp { |
| 251 | fsl,pins = < |
| 252 | MX27_PAD_UART3_TXD__UART3_TXD 0x0 |
| 253 | MX27_PAD_UART3_RXD__UART3_RXD 0x0 |
| 254 | MX27_PAD_UART3_CTS__UART3_CTS 0x0 |
| 255 | MX27_PAD_UART3_RTS__UART3_RTS 0x0 |
| 256 | >; |
| 257 | }; |
| 258 | }; |
| 259 | }; |