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Heiko Schocher2605e902007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 * (easy to change)
30 */
31
32#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
33#define CONFIG_MPC5200 1 /* especially an MPC5200 */
34#define CONFIG_JUPITER 1 /* ... on Jupiter board */
35
36#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
37
38#define CONFIG_BOARD_EARLY_INIT_R 1
39#define CONFIG_BOARD_EARLY_INIT_F 1
40
41#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
42#define BOOTFLAG_WARM 0x02 /* Software reboot */
43
44#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
45#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
46# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
47#endif
48
49/*
50 * Serial console configuration
51 */
52#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
53#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
54#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
55
56/*
57 * PCI Mapping:
58 * 0x40000000 - 0x4fffffff - PCI Memory
59 * 0x50000000 - 0x50ffffff - PCI IO Space
60 */
Wolfgang Denk769104c2007-03-08 21:49:27 +010061/*#define CONFIG_PCI */
Heiko Schocher2605e902007-02-16 07:57:42 +010062
63#if defined(CONFIG_PCI)
64#define CONFIG_PCI_PNP 1
65#define CONFIG_PCI_SCAN_SHOW 1
66
67#define CONFIG_PCI_MEM_BUS 0x40000000
68#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
69#define CONFIG_PCI_MEM_SIZE 0x10000000
70
71#define CONFIG_PCI_IO_BUS 0x50000000
72#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
73#define CONFIG_PCI_IO_SIZE 0x01000000
74#define ADD_PCI_CMD CFG_CMD_PCI
75#endif
76
77#define CFG_XLB_PIPELINING 1
78
79#define CONFIG_NET_MULTI 1
80#define CONFIG_MII 1
81#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
82
83/* Partitions */
84#define CONFIG_MAC_PARTITION
85#define CONFIG_DOS_PARTITION
86#define CONFIG_ISO_PARTITION
87
88#define CONFIG_TIMESTAMP /* Print image info with timestamp */
89
90/*
91 * Supported commands
92 */
93#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
94 CFG_CMD_NFS | \
95 CFG_CMD_SNTP)
96
97/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
98#include <cmd_confdefs.h>
99
100/*
101 * Autobooting
102 */
103#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
104
105#define CONFIG_PREBOOT "echo;" \
106 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
107 "echo"
108
109#undef CONFIG_BOOTARGS
110
111#define CONFIG_EXTRA_ENV_SETTINGS \
112 "netdev=eth0\0" \
113 "nfsargs=setenv bootargs root=/dev/nfs rw " \
114 "nfsroot=${serverip}:${rootpath}\0" \
115 "ramargs=setenv bootargs root=/dev/ram rw\0" \
116 "addip=setenv bootargs ${bootargs} " \
117 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
118 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100119 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocher2605e902007-02-16 07:57:42 +0100120 "bootm ${kernel_addr}\0" \
121 "flash_self=run ramargs addip;" \
122 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100123 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher8502e302007-03-13 09:40:59 +0100124 "${baudrate}\0" \
125 "contyp=ttyS0\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100126 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher8502e302007-03-13 09:40:59 +0100127 "bootm\0" \
128 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocher2605e902007-02-16 07:57:42 +0100129 "bootfile=/tftpboot/jupiter/uImage\0" \
130 ""
131
132#define CONFIG_BOOTCOMMAND "run flash_self"
133
134/*
135 * IPB Bus clocking configuration.
136 */
137#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
138
139#if 0
140/* pass open firmware flat tree */
141#define CONFIG_OF_FLAT_TREE 1
142#define CONFIG_OF_BOARD_SETUP 1
143
144/* maximum size of the flat tree (8K) */
145#define OF_FLAT_TREE_MAX_SIZE 8192
146
147#define OF_CPU "PowerPC,5200@0"
148#define OF_SOC "soc5200@f0000000"
149#define OF_TBCLK (bd->bi_busfreq / 8)
150#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
151#endif
152
153#if 0
154/*
155 * I2C configuration
156 */
157#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
158#define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */
159
160#define CFG_I2C_SPEED 100000 /* 100 kHz */
161#define CFG_I2C_SLAVE 0x7F
162
163/*
164 * EEPROM configuration
165 */
166#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
167#define CFG_I2C_EEPROM_ADDR_LEN 1
168#define CFG_EEPROM_PAGE_WRITE_BITS 3
169#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
170#endif
171
172/*
173 * Flash configuration
174 */
175#define CFG_FLASH_BASE 0xFF000000
176#define CFG_FLASH_SIZE 0x01000000
177
178#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
179
180#define CFG_ENV_ADDR (TEXT_BASE + 0x40000) /* third sector */
181
182#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
183#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
184
185#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */
186
187#define CFG_FLASH_CFI_DRIVER
188#define CFG_FLASH_CFI
189#define CFG_FLASH_EMPTY_INFO
190#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
191#define CFG_UPDATE_FLASH_SIZE 1
192#define CFG_FLASH_USE_BUFFER_WRITE 1
193
194/*
195 * Environment settings
196 */
197#define CFG_ENV_IS_IN_FLASH 1
198#define CFG_ENV_SIZE 0x20000
199#define CFG_ENV_SECT_SIZE 0x20000
200#define CONFIG_ENV_OVERWRITE 1
201
Heiko Schocher8502e302007-03-13 09:40:59 +0100202/* Address and size of Redundant Environment Sector */
203#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
204#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
205
Heiko Schocher2605e902007-02-16 07:57:42 +0100206/*
207 * Memory map
208 */
209#define CFG_MBAR 0xF0000000
210#define CFG_SDRAM_BASE 0x00000000
211#define CFG_DEFAULT_MBAR 0x80000000
212
213/* Use SRAM until RAM will be available */
214#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
215#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
216
217
218#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
219#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
220#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
221
222#define CFG_MONITOR_BASE TEXT_BASE
223#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
224# define CFG_RAMBOOT 1
225#endif
226
227#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
228#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
229#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
230
231/*
232 * Ethernet configuration
233 */
234#define CONFIG_MPC5xxx_FEC 1
235/*
236 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
237 */
238/* #define CONFIG_FEC_10MBIT 1 */
239#define CONFIG_PHY_ADDR 0x00
240
241/*
242 * GPIO configuration
243 */
244#define CFG_GPS_PORT_CONFIG 0x10000004
245
246/*
247 * Miscellaneous configurable options
248 */
249#define CFG_LONGHELP /* undef to save memory */
250#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Heiko Schocher8502e302007-03-13 09:40:59 +0100251
252#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
253#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */
254#ifdef CFG_HUSH_PARSER
255#define CFG_PROMPT_HUSH_PS2 "> "
256#endif
Heiko Schocher2605e902007-02-16 07:57:42 +0100257#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
258#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
259#else
260#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
261#endif
262#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
263#define CFG_MAXARGS 16 /* max number of command args */
264#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
265
266#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
267#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
268#define CFG_ALT_MEMTEST 1
269
270#define CFG_LOAD_ADDR 0x200000 /* default load address */
271
272#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
273
274/*
275 * Various low-level settings
276 */
277#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
278#define CFG_HID0_FINAL HID0_ICE
279
280#define CFG_BOOTCS_START CFG_FLASH_BASE
281#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
282#define CFG_BOOTCS_CFG 0x00047801
283#define CFG_CS0_START CFG_FLASH_BASE
284#define CFG_CS0_SIZE CFG_FLASH_SIZE
285
286#define CFG_CS_BURST 0x00000000
287#define CFG_CS_DEADCYCLE 0x33333333
288
289#define CFG_RESET_ADDRESS 0xff000000
290
291#endif /* __CONFIG_H */