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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 98a8180dcaf55bd61758435d1fe3cfa27588dab8 / . / drivers / serial / serial_rockchip.c
blob: 97d40869a2a37d07274dc613a100a4d79fc80807 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]2/*
3 * Copyright (c) 2015 Google, Inc
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]4 */
5
6#include <common.h>
7#include <debug_uart.h>
8#include <dm.h>
9#include <dt-structs.h>
10#include <ns16550.h>
11#include <serial.h>
Kever Yang15f09a12019-03-28 11:01:23 +0800[diff] [blame]12#include <asm/arch-rockchip/clock.h>
Simon Glass0fd3d912020-12-22 19:30:28 -0700[diff] [blame]13#include <dm/device-internal.h>
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]14
Heiko Stübnercd769162017-02-18 19:46:29 +0100[diff] [blame]15#if defined(CONFIG_ROCKCHIP_RK3188)
Simon Glass8a8d24b2020-12-03 16:55:23 -0700[diff] [blame]16struct rockchip_uart_plat {
Heiko Stübnercd769162017-02-18 19:46:29 +0100[diff] [blame]17 struct dtd_rockchip_rk3188_uart dtplat;
Simon Glass8a8d24b2020-12-03 16:55:23 -0700[diff] [blame]18 struct ns16550_plat plat;
Heiko Stübnercd769162017-02-18 19:46:29 +0100[diff] [blame]19};
20struct dtd_rockchip_rk3188_uart *dtplat, s_dtplat;
21#elif defined(CONFIG_ROCKCHIP_RK3288)
Simon Glass8a8d24b2020-12-03 16:55:23 -0700[diff] [blame]22struct rockchip_uart_plat {
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]23 struct dtd_rockchip_rk3288_uart dtplat;
Simon Glass8a8d24b2020-12-03 16:55:23 -0700[diff] [blame]24 struct ns16550_plat plat;
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]25};
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]26struct dtd_rockchip_rk3288_uart *dtplat, s_dtplat;
Heiko Stübnercd769162017-02-18 19:46:29 +0100[diff] [blame]27#endif
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]28
29static int rockchip_serial_probe(struct udevice *dev)
30{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700[diff] [blame]31 struct rockchip_uart_plat *plat = dev_get_plat(dev);
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]32
33 /* Create some new platform data for the standard driver */
34 plat->plat.base = plat->dtplat.reg[0];
35 plat->plat.reg_shift = plat->dtplat.reg_shift;
36 plat->plat.clock = plat->dtplat.clock_frequency;
Heiko Schocher17fa0322017-01-18 08:05:49 +0100[diff] [blame]37 plat->plat.fcr = UART_FCR_DEFVAL;
Simon Glass0fd3d912020-12-22 19:30:28 -0700[diff] [blame]38 dev_set_plat(dev, &plat->plat);
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]39
40 return ns16550_serial_probe(dev);
41}
42
Heiko Stübnercd769162017-02-18 19:46:29 +0100[diff] [blame]43U_BOOT_DRIVER(rockchip_rk3188_uart) = {
44 .name = "rockchip_rk3188_uart",
45 .id = UCLASS_SERIAL,
Simon Glassd30c7202020-12-22 19:30:18 -0700[diff] [blame]46 .priv_auto = sizeof(struct ns16550),
Simon Glass8a8d24b2020-12-03 16:55:23 -0700[diff] [blame]47 .plat_auto = sizeof(struct rockchip_uart_plat),
Heiko Stübnercd769162017-02-18 19:46:29 +0100[diff] [blame]48 .probe = rockchip_serial_probe,
49 .ops = &ns16550_serial_ops,
50 .flags = DM_FLAG_PRE_RELOC,
51};
52
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]53U_BOOT_DRIVER(rockchip_rk3288_uart) = {
54 .name = "rockchip_rk3288_uart",
55 .id = UCLASS_SERIAL,
Simon Glassd30c7202020-12-22 19:30:18 -0700[diff] [blame]56 .priv_auto = sizeof(struct ns16550),
Simon Glass8a8d24b2020-12-03 16:55:23 -0700[diff] [blame]57 .plat_auto = sizeof(struct rockchip_uart_plat),
Simon Glass2fc24d52016-07-04 11:58:24 -0600[diff] [blame]58 .probe = rockchip_serial_probe,
59 .ops = &ns16550_serial_ops,
60 .flags = DM_FLAG_PRE_RELOC,
61};