blob: d50ab752d39f3f428d377031a9b07056eb3895b2 [file] [log] [blame]
Bin Menga65b25d2015-05-07 21:34:08 +08001/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <pci.h>
9
10DECLARE_GLOBAL_DATA_PTR;
11
12void board_pci_setup_hose(struct pci_controller *hose)
13{
14 hose->first_busno = 0;
15 hose->last_busno = 0;
16
17 /* PCI memory space */
18 pci_set_region(hose->regions + 0,
19 CONFIG_PCI_MEM_BUS,
20 CONFIG_PCI_MEM_PHYS,
21 CONFIG_PCI_MEM_SIZE,
22 PCI_REGION_MEM);
23
24 /* PCI IO space */
25 pci_set_region(hose->regions + 1,
26 CONFIG_PCI_IO_BUS,
27 CONFIG_PCI_IO_PHYS,
28 CONFIG_PCI_IO_SIZE,
29 PCI_REGION_IO);
30
31 pci_set_region(hose->regions + 2,
32 CONFIG_PCI_PREF_BUS,
33 CONFIG_PCI_PREF_PHYS,
34 CONFIG_PCI_PREF_SIZE,
35 PCI_REGION_PREFETCH);
36
37 pci_set_region(hose->regions + 3,
38 0,
39 0,
40 gd->ram_size,
41 PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
42
43 hose->region_count = 4;
44}
45
46int board_pci_post_scan(struct pci_controller *hose)
47{
48 return 0;
49}