blob: 22f8e2783cdf5ec7006b5dbc754b520c120decc2 [file] [log] [blame]
Marcel Ziswilerfa4ce852022-10-22 23:59:39 +02001// SPDX-License-Identifier: GPL-2.0 OR X11
2/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
5 *
6 */
Troy Kiskyf8f9f792019-07-29 12:15:54 -07007
8#include <dt-bindings/clock/imx6qdl-clock.h>
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
11
Troy Kiskyf8f9f792019-07-29 12:15:54 -070012/ {
Troy Kiskyf8f9f792019-07-29 12:15:54 -070013 chosen {
14 stdout-path = &uart2;
15 };
16
Marcel Ziswilerd0399a42022-07-21 15:27:26 +020017 memory@10000000 {
18 device_type = "memory";
Troy Kiskyf8f9f792019-07-29 12:15:54 -070019 reg = <0x10000000 0x40000000>;
20 };
21
Marcel Ziswilerd0399a42022-07-21 15:27:26 +020022 regulators {
23 compatible = "simple-bus";
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 reg_2p5v: regulator@0 {
28 compatible = "regulator-fixed";
29 reg = <0>;
30 regulator-name = "2P5V";
31 regulator-min-microvolt = <2500000>;
32 regulator-max-microvolt = <2500000>;
33 regulator-always-on;
34 };
35
36 reg_3p3v: regulator@1 {
37 compatible = "regulator-fixed";
38 reg = <1>;
39 regulator-name = "3P3V";
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
42 regulator-always-on;
43 };
44
45 reg_usb_otg_vbus: regulator@2 {
46 compatible = "regulator-fixed";
47 reg = <2>;
48 regulator-name = "usb_otg_vbus";
49 regulator-min-microvolt = <5000000>;
50 regulator-max-microvolt = <5000000>;
51 gpio = <&gpio3 22 0>;
52 enable-active-high;
53 };
54
55 reg_can_xcvr: regulator@3 {
56 compatible = "regulator-fixed";
57 reg = <3>;
58 regulator-name = "CAN XCVR";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 pinctrl-names = "default";
62 pinctrl-0 = <&pinctrl_can_xcvr>;
63 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
64 };
65
66 reg_1p5v: regulator@4 {
67 compatible = "regulator-fixed";
68 reg = <4>;
69 regulator-name = "1P5V";
70 regulator-min-microvolt = <1500000>;
71 regulator-max-microvolt = <1500000>;
72 regulator-always-on;
73 };
74
75 reg_1p8v: regulator@5 {
76 compatible = "regulator-fixed";
77 reg = <5>;
78 regulator-name = "1P8V";
79 regulator-min-microvolt = <1800000>;
80 regulator-max-microvolt = <1800000>;
81 regulator-always-on;
82 };
83
84 reg_2p8v: regulator@6 {
85 compatible = "regulator-fixed";
86 reg = <6>;
87 regulator-name = "2P8V";
88 regulator-min-microvolt = <2800000>;
89 regulator-max-microvolt = <2800000>;
90 regulator-always-on;
91 };
92
93 reg_usb_h1_vbus: regulator@7 {
94 compatible = "regulator-fixed";
95 reg = <7>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_usbh1>;
98 regulator-name = "usb_h1_vbus";
99 regulator-min-microvolt = <3300000>;
100 regulator-max-microvolt = <3300000>;
101 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
102 enable-active-high;
103 };
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700104 };
105
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200106 mipi_xclk: mipi_xclk {
107 compatible = "pwm-clock";
108 #clock-cells = <0>;
109 clock-frequency = <22000000>;
110 clock-output-names = "mipi_pwm3";
111 pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */
112 status = "okay";
113 };
114
115 gpio-keys {
116 compatible = "gpio-keys";
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_gpio_keys>;
119
120 power {
121 label = "Power Button";
122 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
123 linux,code = <KEY_POWER>;
124 wakeup-source;
125 };
126
127 menu {
128 label = "Menu";
129 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
130 linux,code = <KEY_MENU>;
131 };
132
133 home {
134 label = "Home";
135 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
136 linux,code = <KEY_HOME>;
137 };
138
139 back {
140 label = "Back";
141 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
142 linux,code = <KEY_BACK>;
143 };
144
145 volume-up {
146 label = "Volume Up";
147 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
148 linux,code = <KEY_VOLUMEUP>;
149 };
150
151 volume-down {
152 label = "Volume Down";
153 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
154 linux,code = <KEY_VOLUMEDOWN>;
155 };
156 };
157
158 sound {
159 compatible = "fsl,imx6q-sabrelite-sgtl5000",
160 "fsl,imx-audio-sgtl5000";
161 model = "imx6q-sabrelite-sgtl5000";
162 ssi-controller = <&ssi1>;
163 audio-codec = <&codec>;
164 audio-routing =
165 "MIC_IN", "Mic Jack",
166 "Mic Jack", "Mic Bias",
167 "Headphone Jack", "HP_OUT";
168 mux-int-port = <1>;
169 mux-ext-port = <4>;
170 };
171
172 backlight_lcd: backlight-lcd {
173 compatible = "pwm-backlight";
174 pwms = <&pwm1 0 5000000>;
175 brightness-levels = <0 4 8 16 32 64 128 255>;
176 default-brightness-level = <7>;
177 power-supply = <&reg_3p3v>;
178 status = "okay";
179 };
180
181 backlight_lvds: backlight-lvds {
182 compatible = "pwm-backlight";
183 pwms = <&pwm4 0 5000000>;
184 brightness-levels = <0 4 8 16 32 64 128 255>;
185 default-brightness-level = <7>;
186 power-supply = <&reg_3p3v>;
187 status = "okay";
188 };
189
190 lcd_display: disp0 {
191 compatible = "fsl,imx-parallel-display";
192 #address-cells = <1>;
193 #size-cells = <0>;
194 interface-pix-fmt = "bgr666";
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_j15>;
197 status = "okay";
198
199 port@0 {
200 reg = <0>;
201
202 lcd_display_in: endpoint {
203 remote-endpoint = <&ipu1_di0_disp0>;
204 };
205 };
206
207 port@1 {
208 reg = <1>;
209
210 lcd_display_out: endpoint {
211 remote-endpoint = <&lcd_panel_in>;
212 };
213 };
214 };
215
216 panel-lcd {
217 compatible = "okaya,rs800480t-7x0gp";
218 backlight = <&backlight_lcd>;
219
220 port {
221 lcd_panel_in: endpoint {
222 remote-endpoint = <&lcd_display_out>;
223 };
224 };
225 };
226
227 panel-lvds0 {
228 compatible = "hannstar,hsd100pxn1";
229 backlight = <&backlight_lvds>;
230
231 port {
232 panel_in: endpoint {
233 remote-endpoint = <&lvds0_out>;
234 };
235 };
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700236 };
237};
238
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200239&ipu1_csi0_from_ipu1_csi0_mux {
240 bus-width = <8>;
241 data-shift = <12>; /* Lines 19:12 used */
242 hsync-active = <1>;
243 vync-active = <1>;
244};
245
246&ipu1_csi0_mux_from_parallel_sensor {
247 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
248};
249
250&ipu1_csi0 {
251 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_ipu1_csi0>;
253};
254
255&audmux {
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_audmux>;
258 status = "okay";
259};
260
261&can1 {
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_can1>;
264 xceiver-supply = <&reg_can_xcvr>;
265 status = "okay";
266};
267
268&clks {
269 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
270 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
271 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
272 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
273};
274
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700275&ecspi1 {
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200276 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_ecspi1>;
279 status = "okay";
280
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200281 flash: flash@0 {
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700282 compatible = "sst,sst25vf016b", "jedec,spi-nor";
283 spi-max-frequency = <20000000>;
284 reg = <0>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700285 };
286};
287
288&fec {
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_enet>;
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200291 phy-mode = "rgmii";
292 phy-handle = <&ethphy>;
293 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700294 status = "okay";
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700295
296 mdio {
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200297 #address-cells = <1>;
298 #size-cells = <0>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700299
300 ethphy: ethernet-phy {
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200301 compatible = "ethernet-phy-ieee802.3-c22";
302 txen-skew-ps = <0>;
303 txc-skew-ps = <3000>;
304 rxdv-skew-ps = <0>;
305 rxc-skew-ps = <3000>;
306 rxd0-skew-ps = <0>;
307 rxd1-skew-ps = <0>;
308 rxd2-skew-ps = <0>;
309 rxd3-skew-ps = <0>;
310 txd0-skew-ps = <0>;
311 txd1-skew-ps = <0>;
312 txd2-skew-ps = <0>;
313 txd3-skew-ps = <0>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700314 };
315 };
316};
317
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200318&hdmi {
319 ddc-i2c-bus = <&i2c2>;
320 status = "okay";
321};
322
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700323&i2c1 {
324 clock-frequency = <100000>;
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200325 pinctrl-names = "default";
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700326 pinctrl-0 = <&pinctrl_i2c1>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700327 status = "okay";
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200328
329 codec: sgtl5000@a {
330 compatible = "fsl,sgtl5000";
331 reg = <0x0a>;
332 clocks = <&clks IMX6QDL_CLK_CKO>;
333 VDDA-supply = <&reg_2p5v>;
334 VDDIO-supply = <&reg_3p3v>;
335 };
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700336};
337
338&i2c2 {
339 clock-frequency = <100000>;
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200340 pinctrl-names = "default";
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700341 pinctrl-0 = <&pinctrl_i2c2>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700342 status = "okay";
343
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200344 ov5640: camera@40 {
345 compatible = "ovti,ov5640";
346 pinctrl-names = "default";
347 pinctrl-0 = <&pinctrl_ov5640>;
348 reg = <0x40>;
349 clocks = <&mipi_xclk>;
350 clock-names = "xclk";
351 DOVDD-supply = <&reg_1p8v>;
352 AVDD-supply = <&reg_2p8v>;
353 DVDD-supply = <&reg_1p5v>;
354 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */
355 powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */
356
357 port {
358 ov5640_to_mipi_csi2: endpoint {
359 remote-endpoint = <&mipi_csi2_in>;
360 clock-lanes = <0>;
361 data-lanes = <1 2>;
362 };
363 };
364 };
365
366 ov5642: camera@42 {
367 compatible = "ovti,ov5642";
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_ov5642>;
370 clocks = <&clks IMX6QDL_CLK_CKO2>;
371 clock-names = "xclk";
372 reg = <0x42>;
373 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
374 powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
375 gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
376 status = "disabled";
377
378 port {
379 ov5642_to_ipu1_csi0_mux: endpoint {
380 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
381 bus-width = <8>;
382 hsync-active = <1>;
383 vsync-active = <1>;
384 };
385 };
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700386 };
387};
388
389&i2c3 {
390 clock-frequency = <100000>;
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200391 pinctrl-names = "default";
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700392 pinctrl-0 = <&pinctrl_i2c3>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700393 status = "okay";
394};
395
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200396&iomuxc {
397 pinctrl-names = "default";
398 pinctrl-0 = <&pinctrl_hog>;
399
400 imx6q-sabrelite {
401 pinctrl_hog: hoggrp {
402 fsl,pins = <
403 /* SGTL5000 sys_mclk */
404 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
405 >;
406 };
407
408 pinctrl_audmux: audmuxgrp {
409 fsl,pins = <
410 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
411 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
412 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
413 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
414 >;
415 };
416
417 pinctrl_can1: can1grp {
418 fsl,pins = <
419 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
420 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
421 >;
422 };
423
424 pinctrl_can_xcvr: can-xcvrgrp {
425 fsl,pins = <
426 /* Flexcan XCVR enable */
427 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
428 >;
429 };
430
431 pinctrl_ecspi1: ecspi1grp {
432 fsl,pins = <
433 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
434 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
435 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
436 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
437 >;
438 };
439
440 pinctrl_enet: enetgrp {
441 fsl,pins = <
442 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
443 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
444 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
445 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
446 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
447 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
448 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
449 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
450 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
451 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
452 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
453 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
454 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
455 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
456 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
457 /* Phy reset */
458 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
459 >;
460 };
461
462 pinctrl_gpio_keys: gpio-keysgrp {
463 fsl,pins = <
464 /* Power Button */
465 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
466 /* Menu Button */
467 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
468 /* Home Button */
469 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
470 /* Back Button */
471 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
472 /* Volume Up Button */
473 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
474 /* Volume Down Button */
475 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
476 >;
477 };
478
479 pinctrl_i2c1: i2c1grp {
480 fsl,pins = <
481 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
482 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
483 >;
484 };
485
486 pinctrl_i2c2: i2c2grp {
487 fsl,pins = <
488 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
489 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
490 >;
491 };
492
493 pinctrl_i2c3: i2c3grp {
494 fsl,pins = <
495 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
496 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
497 >;
498 };
499
500 pinctrl_ipu1_csi0: ipu1csi0grp {
501 fsl,pins = <
502 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
503 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
504 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
505 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
506 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
507 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
508 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
509 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
510 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
511 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
512 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
513 MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0
514 >;
515 };
516
517 pinctrl_j15: j15grp {
518 fsl,pins = <
519 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
520 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
521 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
522 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
523 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
524 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
525 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
526 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
527 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
528 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
529 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
530 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
531 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
532 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
533 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
534 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
535 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
536 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
537 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
538 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
539 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
540 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
541 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
542 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
543 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
544 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
545 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
546 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
547 >;
548 };
549
550 pinctrl_ov5640: ov5640grp {
551 fsl,pins = <
552 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0
553 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
554 >;
555 };
556
557 pinctrl_ov5642: ov5642grp {
558 fsl,pins = <
559 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
560 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
561 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x130b0
562 MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
563 >;
564 };
565
566 pinctrl_pwm1: pwm1grp {
567 fsl,pins = <
568 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
569 >;
570 };
571
572 pinctrl_pwm3: pwm3grp {
573 fsl,pins = <
574 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
575 >;
576 };
577
578 pinctrl_pwm4: pwm4grp {
579 fsl,pins = <
580 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
581 >;
582 };
583
584 pinctrl_uart1: uart1grp {
585 fsl,pins = <
586 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
587 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
588 >;
589 };
590
591 pinctrl_uart2: uart2grp {
592 fsl,pins = <
593 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
594 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
595 >;
596 };
597
598 pinctrl_usbh1: usbh1grp {
599 fsl,pins = <
600 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
601 >;
602 };
603
604 pinctrl_usbotg: usbotggrp {
605 fsl,pins = <
606 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
607 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
608 /* power enable, high active */
609 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
610 >;
611 };
612
613 pinctrl_usdhc3: usdhc3grp {
614 fsl,pins = <
615 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
616 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
617 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
618 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
619 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
620 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
621 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
622 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
623 >;
624 };
625
626 pinctrl_usdhc4: usdhc4grp {
627 fsl,pins = <
628 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
629 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
630 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
631 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
632 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
633 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
634 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
635 >;
636 };
637 };
638};
639
640&ipu1_di0_disp0 {
641 remote-endpoint = <&lcd_display_in>;
642};
643
644&ldb {
645 status = "okay";
646
647 lvds-channel@0 {
648 status = "okay";
649
650 port@4 {
651 reg = <4>;
652
653 lvds0_out: endpoint {
654 remote-endpoint = <&panel_in>;
655 };
656 };
657 };
658};
659
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700660&pcie {
661 status = "okay";
662};
663
664&pwm1 {
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200665 #pwm-cells = <2>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700666 pinctrl-names = "default";
667 pinctrl-0 = <&pinctrl_pwm1>;
668 status = "okay";
669};
670
671&pwm3 {
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200672 #pwm-cells = <2>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700673 pinctrl-names = "default";
674 pinctrl-0 = <&pinctrl_pwm3>;
675 status = "okay";
676};
677
678&pwm4 {
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200679 #pwm-cells = <2>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700680 pinctrl-names = "default";
681 pinctrl-0 = <&pinctrl_pwm4>;
682 status = "okay";
683};
684
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200685&ssi1 {
686 status = "okay";
687};
688
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700689&uart1 {
690 pinctrl-names = "default";
691 pinctrl-0 = <&pinctrl_uart1>;
692 status = "okay";
693};
694
695&uart2 {
696 pinctrl-names = "default";
697 pinctrl-0 = <&pinctrl_uart2>;
698 status = "okay";
699};
700
701&usbh1 {
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200702 vbus-supply = <&reg_usb_h1_vbus>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700703 status = "okay";
704};
705
706&usbotg {
707 vbus-supply = <&reg_usb_otg_vbus>;
708 pinctrl-names = "default";
709 pinctrl-0 = <&pinctrl_usbotg>;
710 disable-over-current;
711 status = "okay";
712};
713
714&usdhc3 {
715 pinctrl-names = "default";
716 pinctrl-0 = <&pinctrl_usdhc3>;
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200717 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
718 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700719 vmmc-supply = <&reg_3p3v>;
720 status = "okay";
721};
722
723&usdhc4 {
724 pinctrl-names = "default";
725 pinctrl-0 = <&pinctrl_usdhc4>;
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200726 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
Troy Kiskyf8f9f792019-07-29 12:15:54 -0700727 vmmc-supply = <&reg_3p3v>;
728 status = "okay";
729};
Marcel Ziswilerd0399a42022-07-21 15:27:26 +0200730
731&mipi_csi {
732 status = "okay";
733
734 port@0 {
735 reg = <0>;
736
737 mipi_csi2_in: endpoint {
738 remote-endpoint = <&ov5640_to_mipi_csi2>;
739 clock-lanes = <0>;
740 data-lanes = <1 2>;
741 };
742 };
743};