blob: d27fcebd7c4654f4d4e9a9987e6f694adaf62268 [file] [log] [blame]
Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
Tom Warrenbfcf46d2013-02-26 12:18:48 +00008#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000011#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
Tom Warrenf01b6312012-12-11 13:34:18 +000017#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
Tom Warrenf01b6312012-12-11 13:34:18 +000019#include <asm/arch/tegra.h> /* get chip and board defs */
20
Simon Glass47f3d3c2014-06-11 23:29:53 -060021#define CONFIG_DM
22#define CONFIG_CMD_DM
23
Rob Herring31df9892013-10-04 10:22:47 -050024#define CONFIG_SYS_TIMER_RATE 1000000
25#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
26
Tom Warrenf01b6312012-12-11 13:34:18 +000027/*
28 * Display CPU and Board information
29 */
30#define CONFIG_DISPLAY_CPUINFO
31#define CONFIG_DISPLAY_BOARDINFO
32
33#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000034
35/* Environment */
36#define CONFIG_ENV_VARS_UBOOT_CONFIG
37#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
38
39/*
40 * Size of malloc() pool
41 */
42#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
43
44/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000045 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000046 */
Tom Warrenf01b6312012-12-11 13:34:18 +000047#define CONFIG_SYS_NS16550
48#define CONFIG_SYS_NS16550_SERIAL
49#define CONFIG_SYS_NS16550_REG_SIZE (-4)
50#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
51
52/*
Stephen Warrenf1756032014-04-18 10:56:11 -060053 * Common HW configuration.
54 * If this varies between SoCs later, move to tegraNN-common.h
55 * Note: This is number of devices, not max device ID.
56 */
57#define CONFIG_SYS_MMC_MAX_DEVICE 4
58
59/*
Tom Warrenf01b6312012-12-11 13:34:18 +000060 * select serial console configuration
61 */
62#define CONFIG_CONS_INDEX 1
63
64/* allow to overwrite serial and ethaddr */
65#define CONFIG_ENV_OVERWRITE
66#define CONFIG_BAUDRATE 115200
67
68/* include default commands */
69#include <config_cmd_default.h>
70
71/* remove unused commands */
72#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
73#undef CONFIG_CMD_FPGA /* FPGA configuration support */
74#undef CONFIG_CMD_IMI
75#undef CONFIG_CMD_IMLS
76#undef CONFIG_CMD_NFS /* NFS support */
77#undef CONFIG_CMD_NET /* network support */
78
79/* turn on command-line edit/hist/auto */
Tom Warrenf01b6312012-12-11 13:34:18 +000080#define CONFIG_COMMAND_HISTORY
Tom Warrenf01b6312012-12-11 13:34:18 +000081
Stephen Warren11d9c032013-02-28 15:03:48 +000082/* turn on commonly used storage-related commands */
Stephen Warren11d9c032013-02-28 15:03:48 +000083#define CONFIG_PARTITION_UUIDS
Stephen Warren11d9c032013-02-28 15:03:48 +000084#define CONFIG_CMD_PART
85
Tom Warrenf01b6312012-12-11 13:34:18 +000086#define CONFIG_SYS_NO_FLASH
87
88#define CONFIG_CONSOLE_MUX
89#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Tom Warrenf01b6312012-12-11 13:34:18 +000090
91/*
92 * Miscellaneous configurable options
93 */
Tom Warrenf01b6312012-12-11 13:34:18 +000094#define CONFIG_SYS_PROMPT V_PROMPT
95/*
96 * Increasing the size of the IO buffer as default nfsargs size is more
97 * than 256 and so it is not possible to edit it
98 */
99#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
100/* Print Buffer Size */
101#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
102 sizeof(CONFIG_SYS_PROMPT) + 16)
103#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
104/* Boot Argument Buffer Size */
105#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
106
107#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
108#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
109
Tom Warrenf01b6312012-12-11 13:34:18 +0000110/*-----------------------------------------------------------------------
111 * Physical Memory Map
112 */
113#define CONFIG_NR_DRAM_BANKS 1
114#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
115#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
116
117#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
118#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
119
120#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
121
122#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
123#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
124#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
125 CONFIG_SYS_INIT_RAM_SIZE - \
126 GENERATED_GBL_DATA_SIZE)
127
128#define CONFIG_TEGRA_GPIO
129#define CONFIG_CMD_GPIO
130#define CONFIG_CMD_ENTERRCM
Tom Warrenf01b6312012-12-11 13:34:18 +0000131
132/* Defines for SPL */
Tom Warrenf01b6312012-12-11 13:34:18 +0000133#define CONFIG_SPL_FRAMEWORK
134#define CONFIG_SPL_RAM_DEVICE
135#define CONFIG_SPL_BOARD_INIT
136#define CONFIG_SPL_NAND_SIMPLE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +0000137#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +0000138 CONFIG_SPL_TEXT_BASE)
139#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
140
141#define CONFIG_SPL_LIBCOMMON_SUPPORT
142#define CONFIG_SPL_LIBGENERIC_SUPPORT
143#define CONFIG_SPL_SERIAL_SUPPORT
144#define CONFIG_SPL_GPIO_SUPPORT
145
Masahiro Yamadacd2e46c2014-03-05 16:59:38 +0900146#ifdef CONFIG_SPL_BUILD
147# define CONFIG_USE_PRIVATE_LIBGCC
148#endif
149
Simon Glassdd7f65f2013-03-05 14:39:56 +0000150#define CONFIG_SYS_GENERIC_BOARD
Tom Warren3efff992013-03-26 10:39:33 -0700151
Stephen Warrena885f852013-02-28 15:03:45 +0000152/* Misc utility code */
153#define CONFIG_BOUNCE_BUFFER
Tom Warren3efff992013-03-26 10:39:33 -0700154#define CONFIG_CRC32_VERIFY
Simon Glassdd7f65f2013-03-05 14:39:56 +0000155
Stephen Warren68cf64d2014-02-05 09:24:57 -0700156#ifndef CONFIG_SPL_BUILD
157#include <config_distro_defaults.h>
158#endif
159
Tom Warrenf01b6312012-12-11 13:34:18 +0000160#endif /* _TEGRA_COMMON_H_ */