blob: efd4214d910dd36d9c2af3c5166a169d7fe66944 [file] [log] [blame]
wdenkda27dcf2002-09-10 19:19:06 +00001/*
2 * (C) Copyright 2000
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * Configuation settings for the implementa impA7 board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*
wdenkda27dcf2002-09-10 19:19:06 +000031 * High Level Configuration Options
32 * (easy to change)
33 */
34#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
35#define CONFIG_IMPA7 1 /* on an impA7 Board */
36#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020037#define CONFIG_ARM7_REVD 1 /* enable ARM720 REV.D Workarounds */
wdenkda27dcf2002-09-10 19:19:06 +000038
39#undef CONFIG_USE_IRQ /* don't need them anymore */
40
41/*
42 * Size of malloc() pool
43 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
45#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenkda27dcf2002-09-10 19:19:06 +000046
47/*
48 * Hardware drivers
49 */
50#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
51#define CS8900_BASE 0x20000000
52#define CS8900_BUS32 1
53
54/*
55 * select serial console configuration
56 */
57#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
58
59/* allow to overwrite serial and ethaddr */
60#define CONFIG_ENV_OVERWRITE
61
62#define CONFIG_BAUDRATE 9600
63
Jon Loeliger2fd90ce2007-07-09 21:48:26 -050064/*
65 * BOOTP options
66 */
67#define CONFIG_BOOTP_SUBNETMASK
68#define CONFIG_BOOTP_GATEWAY
69#define CONFIG_BOOTP_HOSTNAME
70#define CONFIG_BOOTP_BOOTPATH
71#define CONFIG_BOOTP_BOOTFILESIZE
wdenkda27dcf2002-09-10 19:19:06 +000072
wdenkda27dcf2002-09-10 19:19:06 +000073
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050074/*
75 * Command line configuration.
76 */
77#include <config_cmd_default.h>
78
79#define CONFIG_CMD_JFFS2
80
wdenkda27dcf2002-09-10 19:19:06 +000081
82#define CONFIG_BOOTDELAY 3
Wolfgang Denk53677ef2008-05-20 16:00:29 +020083#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
wdenkda27dcf2002-09-10 19:19:06 +000084/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5a */
85/*#define CONFIG_NETMASK 255.255.0.0 */
86/*#define CONFIG_IPADDR 172.22.2.128 */
87/*#define CONFIG_SERVERIP 172.22.2.126 */
88/*#define CONFIG_BOOTFILE "impa7" */
89#define CONFIG_BOOTCOMMAND "bootp;bootm"
90
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050091#if defined(CONFIG_CMD_KGDB)
wdenkda27dcf2002-09-10 19:19:06 +000092#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
93#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
94#endif
95
96/*
97 * Miscellaneous configurable options
98 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020099#define CONFIG_SYS_LONGHELP /* undef to save memory */
100#define CONFIG_SYS_PROMPT "impA7 # " /* Monitor Command Prompt */
101#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
102#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
103#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
104#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkda27dcf2002-09-10 19:19:06 +0000105
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
107#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
wdenkda27dcf2002-09-10 19:19:06 +0000108
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */
wdenkda27dcf2002-09-10 19:19:06 +0000110
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
wdenkda27dcf2002-09-10 19:19:06 +0000112
113 /* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
wdenkda27dcf2002-09-10 19:19:06 +0000115
116/*-----------------------------------------------------------------------
117 * Stack sizes
118 *
119 * The stack sizes are set up in start.S using the settings below
120 */
121#define CONFIG_STACKSIZE (128*1024) /* regular stack */
122#ifdef CONFIG_USE_IRQ
123#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
124#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
125#endif
126
127/*-----------------------------------------------------------------------
128 * Physical Memory Map
129 */
130#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
131#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
132#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
133#define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */
134#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
135
136#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
137#define PHYS_FLASH_2 0x10000000 /* Flash Bank #2 */
138#define PHYS_FLASH_SIZE 0x00800000 /* 16 MB */
139
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenkda27dcf2002-09-10 19:19:06 +0000141
142/*-----------------------------------------------------------------------
143 * FLASH and environment organization
144 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
146#define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
wdenkda27dcf2002-09-10 19:19:06 +0000147
148/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
150#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenkda27dcf2002-09-10 19:19:06 +0000151
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200152#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200153#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
154#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
wdenkda27dcf2002-09-10 19:19:06 +0000155
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200156/*
157 * JFFS2 partitions
158 *
159 */
160/* No command line, one static partition, whole device */
Stefan Roese68d7d652009-03-19 13:30:36 +0100161#undef CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200162#define CONFIG_JFFS2_DEV "nor0"
163#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
164#define CONFIG_JFFS2_PART_OFFSET 0x00020000
165
166/* mtdparts command line support */
167/*
Stefan Roese68d7d652009-03-19 13:30:36 +0100168#define CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200169#define MTDIDS_DEFAULT "nor0=impA7 NOR Flash Bank #0,nor1=impA7 NOR Flash Bank #1"
170#define MTDPARTS_DEFAULT "mtdparts=impA7 NOR Flash Bank #0:-(FileSystem1);impA7 NOR Flash Bank #1:-(FileSystem2)"
171*/
wdenkda27dcf2002-09-10 19:19:06 +0000172
173#endif /* __CONFIG_H */