maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 1 | menu "Watchdog Timer Support" |
Ye Li | 253531b | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 2 | |
Shreenidhi Shedi | 42537ca | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 3 | config WATCHDOG |
| 4 | bool "Enable U-Boot watchdog reset" |
Christophe Leroy | 7e00e90 | 2020-02-26 16:17:52 +0000 | [diff] [blame] | 5 | depends on !HW_WATCHDOG |
Shreenidhi Shedi | 42537ca | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 6 | help |
| 7 | This option enables U-Boot watchdog support where U-Boot is using |
| 8 | watchdog_reset function to service watchdog device in U-Boot. Enable |
| 9 | this option if you want to service enabled watchdog by U-Boot. Disable |
| 10 | this option if you want U-Boot to start watchdog but never service it. |
| 11 | |
Pali Rohár | 830d29a | 2021-03-09 14:26:56 +0100 | [diff] [blame] | 12 | config WATCHDOG_AUTOSTART |
| 13 | bool "Automatically start watchdog timer" |
| 14 | depends on WDT |
| 15 | default y |
| 16 | help |
| 17 | Automatically start watchdog timer and start servicing it during |
| 18 | init phase. Enabled by default. Disable this option if you want |
| 19 | to compile U-Boot with CONFIG_WDT support but do not want to |
| 20 | activate watchdog, like when CONFIG_WDT option is disabled. You |
| 21 | would be able to start watchdog manually by 'wdt' command. Useful |
| 22 | when you want to have support for 'wdt' command but do not want |
| 23 | to have watchdog enabled by default. |
| 24 | |
Heiko Schocher | ca51ef7 | 2019-09-30 09:33:43 +0200 | [diff] [blame] | 25 | config WATCHDOG_TIMEOUT_MSECS |
| 26 | int "Watchdog timeout in msec" |
| 27 | default 128000 if ARCH_MX25 || ARCH_MX31 || ARCH_MX5 || ARCH_MX6 |
| 28 | default 128000 if ARCH_MX7 || ARCH_VF610 |
| 29 | default 30000 if ARCH_SOCFPGA |
| 30 | default 60000 |
| 31 | help |
| 32 | Watchdog timeout in msec |
| 33 | |
Paolo Pisati | 45a6d23 | 2017-02-10 17:28:05 +0100 | [diff] [blame] | 34 | config HW_WATCHDOG |
| 35 | bool |
| 36 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 37 | config IMX_WATCHDOG |
| 38 | bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP" |
Marek Vasut | 4b969de | 2019-06-09 03:46:22 +0200 | [diff] [blame] | 39 | select HW_WATCHDOG if !WDT |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 40 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 41 | Select this to enable the IMX and LSCH2 of Layerscape watchdog |
| 42 | driver. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 43 | |
Michael Walle | 95b3d6a | 2020-09-24 10:09:15 +0200 | [diff] [blame] | 44 | config WATCHDOG_RESET_DISABLE |
| 45 | bool "Disable reset watchdog" |
| 46 | depends on IMX_WATCHDOG |
| 47 | help |
| 48 | Disable reset watchdog, which can let WATCHDOG_RESET invalid, so |
| 49 | that the watchdog will not be fed in u-boot. |
| 50 | |
Tom Rini | 897f706 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 51 | config OMAP_WATCHDOG |
| 52 | bool "TI OMAP watchdog driver" |
| 53 | depends on ARCH_OMAP2PLUS |
| 54 | select HW_WATCHDOG |
Tom Rini | 897f706 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 55 | help |
| 56 | Say Y here to enable the OMAP3+ watchdog driver. |
Felipe Balbi | 8f8a12d | 2017-07-05 20:33:20 +0300 | [diff] [blame] | 57 | |
Ye Li | 253531b | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 58 | config ULP_WATCHDOG |
| 59 | bool "i.MX7ULP watchdog" |
| 60 | help |
| 61 | Say Y here to enable i.MX7ULP watchdog driver. |
| 62 | |
Marek Vasut | 8941f84 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 63 | config DESIGNWARE_WATCHDOG |
| 64 | bool "Designware watchdog timer support" |
Marek Vasut | cf8c836 | 2019-06-27 01:19:23 +0200 | [diff] [blame] | 65 | select HW_WATCHDOG if !WDT |
Jagan Teki | 0a08a61 | 2020-04-20 23:34:13 +0530 | [diff] [blame] | 66 | default y if WDT && ROCKCHIP_RK3399 |
Marek Vasut | 8941f84 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 67 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 68 | Enable this to support Designware Watchdog Timer IP, present e.g. |
| 69 | on Altera SoCFPGA SoCs. |
Marek Vasut | 8941f84 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 70 | |
maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 71 | config WDT |
| 72 | bool "Enable driver model for watchdog timer drivers" |
| 73 | depends on DM |
Stefan Roese | 0698528 | 2019-04-11 15:58:44 +0200 | [diff] [blame] | 74 | imply WATCHDOG |
maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 75 | help |
| 76 | Enable driver model for watchdog timer. At the moment the API |
| 77 | is very simple and only supports four operations: |
Patrice Chotard | 8d4f91b | 2019-04-25 12:57:28 +0200 | [diff] [blame] | 78 | start, stop, reset and expire_now (expire immediately). |
maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 79 | What exactly happens when the timer expires is up to a particular |
| 80 | device/driver. |
| 81 | |
Marek Behún | 2b69a67 | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 82 | config WDT_ARMADA_37XX |
| 83 | bool "Marvell Armada 37xx watchdog timer support" |
| 84 | depends on WDT && ARMADA_3700 |
| 85 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 86 | Enable this to support Watchdog Timer on Marvell Armada 37xx SoC. |
| 87 | There are 4 possible clocks which can be used on these SoCs. This |
| 88 | driver uses the second clock (ID 1), assuming that so will also |
| 89 | Linux's driver. |
Marek Behún | 2b69a67 | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 90 | |
maxims@google.com | 1eb0a46 | 2017-04-17 12:00:22 -0700 | [diff] [blame] | 91 | config WDT_ASPEED |
| 92 | bool "Aspeed ast2400/ast2500 watchdog timer support" |
| 93 | depends on WDT |
| 94 | default y if ARCH_ASPEED |
| 95 | help |
| 96 | Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices. |
| 97 | The watchdog timer is stopped when initialized. It performs reset, either |
| 98 | full SoC reset or CPU or just some peripherals, based on the flags. |
| 99 | It currently does not support Boot Flash Addressing Mode Detection or |
| 100 | Second Boot. |
| 101 | |
Chia-Wei, Wang | 337d95c | 2020-12-14 13:54:25 +0800 | [diff] [blame] | 102 | config WDT_AST2600 |
| 103 | bool "Aspeed AST2600 watchdog timer support" |
| 104 | depends on WDT |
| 105 | default y if ASPEED_AST2600 |
| 106 | help |
| 107 | Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices. |
| 108 | The watchdog timer is stopped when initialized. It performs reset, either |
| 109 | full SoC reset or CPU or just some peripherals, based on the flags. |
| 110 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 111 | config WDT_AT91 |
| 112 | bool "AT91 watchdog timer support" |
| 113 | depends on WDT |
| 114 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 115 | Select this to enable Microchip watchdog timer, which can be found on |
| 116 | some AT91 devices. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 117 | |
Álvaro Fernández Rojas | 7733193 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 118 | config WDT_BCM6345 |
| 119 | bool "BCM6345 watchdog timer support" |
Philippe Reynes | d0edec6 | 2020-01-07 20:14:11 +0100 | [diff] [blame] | 120 | depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ |
| 121 | ARCH_BCM6858 || ARCH_BCM63158) |
Álvaro Fernández Rojas | 7733193 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 122 | help |
| 123 | Select this to enable watchdog timer for BCM6345 SoCs. |
| 124 | The watchdog timer is stopped when initialized. |
| 125 | It performs full SoC reset. |
| 126 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 127 | config WDT_CDNS |
| 128 | bool "Cadence watchdog timer support" |
| 129 | depends on WDT |
| 130 | imply WATCHDOG |
| 131 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 132 | Select this to enable Cadence watchdog timer, which can be found on some |
| 133 | Xilinx Microzed Platform. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 134 | |
Jason Li | 7f54b83 | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 135 | config WDT_CORTINA |
| 136 | bool "Cortina Access CAxxxx watchdog timer support" |
| 137 | depends on WDT |
| 138 | help |
| 139 | Cortina Access CAxxxx watchdog timer support. |
| 140 | This driver support all CPU ISAs supported by Cortina |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 141 | Access CAxxxx SoCs. |
Jason Li | 7f54b83 | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 142 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 143 | config WDT_MPC8xx |
| 144 | bool "MPC8xx watchdog timer support" |
| 145 | depends on WDT && MPC8xx |
Christophe Leroy | a682560 | 2020-02-20 07:39:51 +0000 | [diff] [blame] | 146 | select HW_WATCHDOG |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 147 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 148 | Select this to enable mpc8xx watchdog timer |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 149 | |
Weijie Gao | bba4ec8 | 2020-11-12 16:36:28 +0800 | [diff] [blame] | 150 | config WDT_MT7620 |
| 151 | bool "MediaTek MT7620 watchdog timer support" |
| 152 | depends on WDT && SOC_MT7620 |
| 153 | help |
| 154 | Select this to enable watchdog timer on MediaTek MT7620 and earlier |
| 155 | SoC chips. |
| 156 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 157 | config WDT_MT7621 |
| 158 | bool "MediaTek MT7621 watchdog timer support" |
| 159 | depends on WDT && SOC_MT7628 |
| 160 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 161 | Select this to enable Ralink / Mediatek watchdog timer, |
| 162 | which can be found on some MediaTek chips. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 163 | |
| 164 | config WDT_MTK |
| 165 | bool "MediaTek watchdog timer support" |
| 166 | depends on WDT && ARCH_MEDIATEK |
| 167 | help |
| 168 | Select this to enable watchdog timer for MediaTek SoCs. |
| 169 | The watchdog timer is stopped when initialized. |
| 170 | It performs full SoC reset. |
| 171 | |
Suneel Garapati | af6ba90 | 2019-10-21 16:09:36 -0700 | [diff] [blame] | 172 | config WDT_OCTEONTX |
| 173 | bool "OcteonTX core watchdog support" |
| 174 | depends on WDT && (ARCH_OCTEONTX || ARCH_OCTEONTX2) |
| 175 | default y |
| 176 | imply WATCHDOG |
| 177 | help |
| 178 | This enables OcteonTX watchdog driver, which can be |
| 179 | found on OcteonTX/TX2 chipsets and inline with driver model. |
| 180 | Only supports watchdog reset. |
| 181 | |
Suniel Mahesh | 7659ea3 | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 182 | config WDT_OMAP3 |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 183 | bool "TI OMAP watchdog timer support" |
| 184 | depends on WDT && ARCH_OMAP2PLUS |
| 185 | default y if AM33XX |
| 186 | help |
Suniel Mahesh | 7659ea3 | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 187 | This enables OMAP3+ watchdog timer driver, which can be |
| 188 | found on some TI chipsets and inline with driver model. |
| 189 | |
Marek Behún | 2ab7704 | 2017-06-09 19:28:41 +0200 | [diff] [blame] | 190 | config WDT_ORION |
| 191 | bool "Orion watchdog timer support" |
| 192 | depends on WDT |
Chris Packham | 8e427ba | 2019-02-18 10:30:53 +1300 | [diff] [blame] | 193 | select CLK |
Marek Behún | 2ab7704 | 2017-06-09 19:28:41 +0200 | [diff] [blame] | 194 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 195 | Select this to enable Orion watchdog timer, which can be found on some |
| 196 | Marvell Armada chips. |
Marek Behún | 2ab7704 | 2017-06-09 19:28:41 +0200 | [diff] [blame] | 197 | |
Jan Kiszka | d388f36 | 2020-06-23 13:15:08 +0200 | [diff] [blame] | 198 | config WDT_K3_RTI |
| 199 | bool "Texas Instruments K3 RTI watchdog" |
| 200 | depends on WDT && ARCH_K3 |
| 201 | help |
| 202 | Say Y here if you want to include support for the K3 watchdog |
| 203 | timer (RTI module) available in the K3 generation of processors. |
| 204 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 205 | config WDT_SANDBOX |
| 206 | bool "Enable Watchdog Timer support for Sandbox" |
| 207 | depends on SANDBOX && WDT |
| 208 | help |
| 209 | Enable Watchdog Timer support in Sandbox. This is a dummy device that |
| 210 | can be probed and supports all of the methods of WDT, but does not |
| 211 | really do anything. |
| 212 | |
Zhao Qiang | f27d73e | 2020-07-10 16:55:18 +0800 | [diff] [blame] | 213 | config WDT_SBSA |
| 214 | bool "SBSA watchdog timer support" |
| 215 | depends on WDT |
| 216 | help |
| 217 | Select this to enable SBSA watchdog timer. |
| 218 | This driver can operate ARM SBSA Generic Watchdog as a single stage. |
| 219 | In the single stage mode, when the timeout is reached, your system |
| 220 | will be reset by WS1. The first signal (WS0) is ignored. |
| 221 | |
Qiang Zhao | 0652d9f | 2019-05-07 03:16:09 +0000 | [diff] [blame] | 222 | config WDT_SP805 |
| 223 | bool "SP805 watchdog timer support" |
| 224 | depends on WDT |
| 225 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 226 | Select this to enable SP805 watchdog timer, which can be found on some |
| 227 | nxp layerscape chips. |
Qiang Zhao | 0652d9f | 2019-05-07 03:16:09 +0000 | [diff] [blame] | 228 | |
Patrice Chotard | 8c1007a | 2019-04-30 17:26:22 +0200 | [diff] [blame] | 229 | config WDT_STM32MP |
| 230 | bool "IWDG watchdog driver for STM32 MP's family" |
| 231 | depends on WDT |
| 232 | imply WATCHDOG |
| 233 | help |
| 234 | Enable the STM32 watchdog (IWDG) driver. Enable support to |
| 235 | configure STM32's on-SoC watchdog. |
| 236 | |
Shreenidhi Shedi | e0e9caa | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 237 | config XILINX_TB_WATCHDOG |
| 238 | bool "Xilinx Axi watchdog timer support" |
| 239 | depends on WDT |
| 240 | imply WATCHDOG |
| 241 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 242 | Select this to enable Xilinx Axi watchdog timer, which can be found on some |
| 243 | Xilinx Microblaze Platforms. |
Shreenidhi Shedi | e0e9caa | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 244 | |
Ashok Reddy Soma | 5028358 | 2020-03-11 03:06:04 -0600 | [diff] [blame] | 245 | config WDT_XILINX |
| 246 | bool "Xilinx window watchdog timer support" |
| 247 | depends on WDT && ARCH_VERSAL |
| 248 | select REGMAP |
| 249 | imply WATCHDOG |
| 250 | help |
| 251 | Select this to enable Xilinx window watchdog timer, which can be found on |
| 252 | Xilinx Versal Platforms. |
| 253 | |
Andy Shevchenko | c974a3d | 2019-06-21 13:28:08 +0300 | [diff] [blame] | 254 | config WDT_TANGIER |
| 255 | bool "Intel Tangier watchdog timer support" |
| 256 | depends on WDT && INTEL_MID |
| 257 | help |
| 258 | This enables support for watchdog controller available on |
| 259 | Intel Tangier SoC. If you're using a board with Intel Tangier |
| 260 | SoC, say Y here. |
| 261 | |
Marek Vasut | 6874cb7 | 2019-06-09 03:46:21 +0200 | [diff] [blame] | 262 | config SPL_WDT |
| 263 | bool "Enable driver model for watchdog timer drivers in SPL" |
| 264 | depends on SPL_DM |
| 265 | help |
| 266 | Enable driver model for watchdog timer in SPL. |
| 267 | This is similar to CONFIG_WDT in U-Boot. |
| 268 | |
Ye Li | 253531b | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 269 | endmenu |