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Bo Shencc30b782012-06-27 21:58:20 +00001/*
2 * (C) Copyright 2012
3 * Atmel Semiconductor <www.atmel.com>
4 * Written-by: Bo Shen <voice.shen@atmel.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Bo Shencc30b782012-06-27 21:58:20 +00007 */
8
9#include <common.h>
Wenyou Yang17b68b52016-08-05 08:57:35 +080010#include <clk.h>
11#include <dm.h>
Bo Shencc30b782012-06-27 21:58:20 +000012#include <usb.h>
13#include <asm/io.h>
Bo Shencc30b782012-06-27 21:58:20 +000014#include <asm/arch/clk.h>
15
16#include "ehci.h"
Bo Shencc30b782012-06-27 21:58:20 +000017
Wenyou Yang17b68b52016-08-05 08:57:35 +080018DECLARE_GLOBAL_DATA_PTR;
19
20#ifndef CONFIG_DM_USB
21
Troy Kisky127efc42013-10-10 15:27:57 -070022int ehci_hcd_init(int index, enum usb_init_type init,
23 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Bo Shencc30b782012-06-27 21:58:20 +000024{
Bo Shencc30b782012-06-27 21:58:20 +000025 /* Enable UTMI PLL */
Wenyou Yangb55b5962016-02-02 11:11:53 +080026 if (at91_upll_clk_enable())
27 return -1;
Bo Shencc30b782012-06-27 21:58:20 +000028
29 /* Enable USB Host clock */
Bo Shen97b20432014-08-06 17:24:57 +080030 at91_periph_clk_enable(ATMEL_ID_UHPHS);
Bo Shencc30b782012-06-27 21:58:20 +000031
Lucas Stach676ae062012-09-26 00:14:35 +020032 *hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI;
33 *hcor = (struct ehci_hcor *)((uint32_t)*hccr +
34 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
Bo Shencc30b782012-06-27 21:58:20 +000035
36 return 0;
37}
38
Lucas Stach676ae062012-09-26 00:14:35 +020039int ehci_hcd_stop(int index)
Bo Shencc30b782012-06-27 21:58:20 +000040{
Bo Shencc30b782012-06-27 21:58:20 +000041 /* Disable USB Host Clock */
Bo Shen97b20432014-08-06 17:24:57 +080042 at91_periph_clk_disable(ATMEL_ID_UHPHS);
Bo Shencc30b782012-06-27 21:58:20 +000043
Bo Shencc30b782012-06-27 21:58:20 +000044 /* Disable UTMI PLL */
Wenyou Yangb55b5962016-02-02 11:11:53 +080045 if (at91_upll_clk_disable())
46 return -1;
Bo Shencc30b782012-06-27 21:58:20 +000047
48 return 0;
49}
Wenyou Yang17b68b52016-08-05 08:57:35 +080050
51#else
52
53struct ehci_atmel_priv {
54 struct ehci_ctrl ehci;
55};
56
57static int ehci_atmel_enable_clk(struct udevice *dev)
58{
Wenyou Yang17b68b52016-08-05 08:57:35 +080059 struct clk clk;
Wenyou Yang17b68b52016-08-05 08:57:35 +080060 int ret;
61
62 ret = clk_get_by_index(dev, 0, &clk);
63 if (ret)
64 return ret;
65
66 ret = clk_enable(&clk);
67 if (ret)
68 return ret;
69
70 ret = clk_get_by_index(dev, 1, &clk);
71 if (ret)
72 return -EINVAL;
73
Wenyou Yang17b68b52016-08-05 08:57:35 +080074 ret = clk_enable(&clk);
75 if (ret)
76 return ret;
77
78 clk_free(&clk);
79
80 return 0;
81}
82
83static int ehci_atmel_probe(struct udevice *dev)
84{
85 struct ehci_hccr *hccr;
86 struct ehci_hcor *hcor;
87 fdt_addr_t hcd_base;
88 int ret;
89
90 ret = ehci_atmel_enable_clk(dev);
91 if (ret) {
92 debug("Failed to enable USB Host clock\n");
93 return ret;
94 }
95
96 /*
97 * Get the base address for EHCI controller from the device node
98 */
99 hcd_base = dev_get_addr(dev);
100 if (hcd_base == FDT_ADDR_T_NONE) {
101 debug("Can't get the EHCI register base address\n");
102 return -ENXIO;
103 }
104
105 hccr = (struct ehci_hccr *)hcd_base;
106 hcor = (struct ehci_hcor *)
107 ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
108
109 debug("echi-atmel: init hccr %x and hcor %x hc_length %d\n",
110 (u32)hccr, (u32)hcor,
111 (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
112
113 return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
114}
115
Wenyou Yang17b68b52016-08-05 08:57:35 +0800116static const struct udevice_id ehci_usb_ids[] = {
117 { .compatible = "atmel,at91sam9g45-ehci", },
118 { }
119};
120
121U_BOOT_DRIVER(ehci_atmel) = {
122 .name = "ehci_atmel",
123 .id = UCLASS_USB,
124 .of_match = ehci_usb_ids,
125 .probe = ehci_atmel_probe,
Masahiro Yamada40527342016-09-06 22:17:34 +0900126 .remove = ehci_deregister,
Wenyou Yang17b68b52016-08-05 08:57:35 +0800127 .ops = &ehci_usb_ops,
128 .platdata_auto_alloc_size = sizeof(struct usb_platdata),
129 .priv_auto_alloc_size = sizeof(struct ehci_atmel_priv),
130 .flags = DM_FLAG_ALLOC_PRIV_DMA,
131};
132
133#endif