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Masahiro Yamada230ce302014-12-06 00:03:24 +09001/*
2 * Device Tree Source for UniPhier PH1-sLD3 SoC
3 *
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +09004 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada230ce302014-12-06 00:03:24 +09005 *
Masahiro Yamada13b2ba12015-06-30 18:27:01 +09006 * SPDX-License-Identifier: GPL-2.0+ X11
Masahiro Yamada230ce302014-12-06 00:03:24 +09007 */
8
9/include/ "skeleton.dtsi"
10
11/ {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090012 compatible = "socionext,ph1-sld3";
Masahiro Yamada230ce302014-12-06 00:03:24 +090013
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090017 enable-method = "socionext,uniphier-smp";
Masahiro Yamada230ce302014-12-06 00:03:24 +090018
19 cpu@0 {
20 device_type = "cpu";
21 compatible = "arm,cortex-a9";
22 reg = <0>;
23 };
24
25 cpu@1 {
26 device_type = "cpu";
27 compatible = "arm,cortex-a9";
28 reg = <1>;
29 };
30 };
31
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090032 clocks {
Masahiro Yamadacc336092016-02-02 21:11:33 +090033 refclk: ref {
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
36 clock-frequency = <24576000>;
37 };
38
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090039 arm_timer_clk: arm_timer_clk {
40 #clock-cells = <0>;
41 compatible = "fixed-clock";
42 clock-frequency = <50000000>;
43 };
Masahiro Yamadad243c182015-08-28 22:33:13 +090044
45 uart_clk: uart_clk {
46 #clock-cells = <0>;
47 compatible = "fixed-clock";
48 clock-frequency = <36864000>;
49 };
50
51 iobus_clk: iobus_clk {
52 #clock-cells = <0>;
53 compatible = "fixed-clock";
54 clock-frequency = <100000000>;
55 };
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090056 };
57
Masahiro Yamada230ce302014-12-06 00:03:24 +090058 soc {
59 compatible = "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <1>;
62 ranges;
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090063 interrupt-parent = <&intc>;
64
65 extbus: extbus {
66 compatible = "simple-bus";
67 #address-cells = <2>;
68 #size-cells = <1>;
69 };
70
71 timer@20000200 {
72 compatible = "arm,cortex-a9-global-timer";
73 reg = <0x20000200 0x20>;
74 interrupts = <1 11 0x304>;
75 clocks = <&arm_timer_clk>;
76 };
77
78 timer@20000600 {
79 compatible = "arm,cortex-a9-twd-timer";
80 reg = <0x20000600 0x20>;
81 interrupts = <1 13 0x304>;
82 clocks = <&arm_timer_clk>;
83 };
84
85 intc: interrupt-controller@20001000 {
86 compatible = "arm,cortex-a9-gic";
87 #interrupt-cells = <3>;
88 interrupt-controller;
89 reg = <0x20001000 0x1000>,
90 <0x20000100 0x100>;
91 };
Masahiro Yamada230ce302014-12-06 00:03:24 +090092
Masahiro Yamadad243c182015-08-28 22:33:13 +090093 serial0: serial@54006800 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090094 compatible = "socionext,uniphier-uart";
Masahiro Yamada230ce302014-12-06 00:03:24 +090095 status = "disabled";
Masahiro Yamadad243c182015-08-28 22:33:13 +090096 reg = <0x54006800 0x40>;
97 interrupts = <0 33 4>;
98 clocks = <&uart_clk>;
Masahiro Yamada230ce302014-12-06 00:03:24 +090099 clock-frequency = <36864000>;
100 };
101
Masahiro Yamadad243c182015-08-28 22:33:13 +0900102 serial1: serial@54006900 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900103 compatible = "socionext,uniphier-uart";
Masahiro Yamada230ce302014-12-06 00:03:24 +0900104 status = "disabled";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900105 reg = <0x54006900 0x40>;
106 interrupts = <0 35 4>;
107 clocks = <&uart_clk>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900108 clock-frequency = <36864000>;
109 };
110
Masahiro Yamadad243c182015-08-28 22:33:13 +0900111 serial2: serial@54006a00 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900112 compatible = "socionext,uniphier-uart";
Masahiro Yamada230ce302014-12-06 00:03:24 +0900113 status = "disabled";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900114 reg = <0x54006a00 0x40>;
115 interrupts = <0 37 4>;
116 clocks = <&uart_clk>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900117 clock-frequency = <36864000>;
118 };
119
120 i2c0: i2c@58400000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900121 compatible = "socionext,uniphier-i2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900122 status = "disabled";
123 reg = <0x58400000 0x40>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900124 #address-cells = <1>;
125 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900126 interrupts = <0 41 1>;
127 clocks = <&iobus_clk>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900128 clock-frequency = <100000>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900129 };
130
131 i2c1: i2c@58480000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900132 compatible = "socionext,uniphier-i2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900133 status = "disabled";
134 reg = <0x58480000 0x40>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900135 #address-cells = <1>;
136 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900137 interrupts = <0 42 1>;
138 clocks = <&iobus_clk>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900139 clock-frequency = <100000>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900140 };
141
142 i2c2: i2c@58500000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900143 compatible = "socionext,uniphier-i2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900144 status = "disabled";
145 reg = <0x58500000 0x40>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900146 #address-cells = <1>;
147 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900148 interrupts = <0 43 1>;
149 clocks = <&iobus_clk>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900150 clock-frequency = <100000>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900151 };
152
153 i2c3: i2c@58580000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900154 compatible = "socionext,uniphier-i2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900155 status = "disabled";
156 reg = <0x58580000 0x40>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900157 #address-cells = <1>;
158 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900159 interrupts = <0 44 1>;
160 clocks = <&iobus_clk>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900161 clock-frequency = <100000>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900162 };
163
Masahiro Yamadad243c182015-08-28 22:33:13 +0900164 /* chip-internal connection for DMD */
Masahiro Yamadaf1d79452015-07-21 14:04:23 +0900165 i2c4: i2c@58600000 {
Masahiro Yamadad243c182015-08-28 22:33:13 +0900166 compatible = "socionext,uniphier-i2c";
167 reg = <0x58600000 0x40>;
Masahiro Yamadaf1d79452015-07-21 14:04:23 +0900168 #address-cells = <1>;
169 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900170 interrupts = <0 45 1>;
171 clocks = <&iobus_clk>;
Masahiro Yamadaf1d79452015-07-21 14:04:23 +0900172 clock-frequency = <400000>;
Masahiro Yamadaf1d79452015-07-21 14:04:23 +0900173 };
174
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +0900175 system-bus-controller-misc@59800000 {
176 compatible = "socionext,uniphier-system-bus-controller-misc",
177 "syscon";
178 reg = <0x59800000 0x2000>;
179 };
180
Masahiro Yamada230ce302014-12-06 00:03:24 +0900181 usb0: usb@5a800100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900182 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada230ce302014-12-06 00:03:24 +0900183 status = "disabled";
184 reg = <0x5a800100 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900185 interrupts = <0 80 4>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900186 };
187
188 usb1: usb@5a810100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900189 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada230ce302014-12-06 00:03:24 +0900190 status = "disabled";
191 reg = <0x5a810100 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900192 interrupts = <0 81 4>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900193 };
194
195 usb2: usb@5a820100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900196 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada230ce302014-12-06 00:03:24 +0900197 status = "disabled";
198 reg = <0x5a820100 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900199 interrupts = <0 82 4>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900200 };
201
202 usb3: usb@5a830100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900203 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada230ce302014-12-06 00:03:24 +0900204 status = "disabled";
205 reg = <0x5a830100 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900206 interrupts = <0 83 4>;
Masahiro Yamada230ce302014-12-06 00:03:24 +0900207 };
208
Masahiro Yamada233812a2016-02-02 21:11:34 +0900209 sysctrl: sysctrl@f1840000 {
210 compatible = "socionext,ph1-sld3-sysctrl";
211 reg = <0xf1840000 0x4000>;
212 #clock-cells = <1>;
213 clock-names = "ref";
214 clocks = <&refclk>;
215 };
216
Masahiro Yamada230ce302014-12-06 00:03:24 +0900217 nand: nand@f8000000 {
218 compatible = "denali,denali-nand-dt";
219 reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
220 reg-names = "nand_data", "denali_reg";
221 };
222 };
223};