blob: 12c2e1f6159ac31cc0a526f0fed246e769b75fcb [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +05302/*
3 * Copyright (C) 2013 Samsung Electronics
4 *
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +05305 * Configuration settings for the SAMSUNG SMDK5420 board.
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +05306 */
7
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +05308#ifndef __CONFIG_SMDK5420_H
9#define __CONFIG_SMDK5420_H
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +053010
Simon Glass87033d42014-10-07 22:01:46 -060011#include <configs/exynos5420-common.h>
Simon Glassbf637ea2015-08-03 08:19:29 -060012#include <configs/exynos5-dt-common.h>
13#include <configs/exynos5-common.h>
14
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +053015#define CONFIG_SMDK5420 /* which is in a SMDK5420 */
16
Hyungwon Hwang43900da2014-12-12 14:45:44 +090017#define CONFIG_SYS_SDRAM_BASE 0x20000000
Rajeshwari Birje76dd9b62013-12-26 09:44:26 +053018
Akshay Saraswat43581c82014-11-13 22:38:19 +053019/* DRAM Memory Banks */
Akshay Saraswat43581c82014-11-13 22:38:19 +053020#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
21
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053022#endif /* __CONFIG_SMDK5420_H */