| Giulio Benetti | 8d9c076 | 2020-01-10 15:51:48 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2019 |
| 4 | * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> |
| 5 | */ |
| 6 | |
| Giulio Benetti | 8d9c076 | 2020-01-10 15:51:48 +0100 | [diff] [blame] | 7 | #include <config.h> |
| 8 | |
| 9 | /* image version */ |
| 10 | |
| 11 | IMAGE_VERSION 2 |
| 12 | |
| 13 | /* |
| 14 | * Boot Device : one of |
| 15 | * spi/sd/nand/onenand, qspi/nor |
| 16 | */ |
| 17 | |
| 18 | BOOT_FROM sd |
| 19 | |
| 20 | /* |
| 21 | * Device Configuration Data (DCD) |
| 22 | * |
| 23 | * Each entry must have the format: |
| 24 | * Addr-type Address Value |
| 25 | * |
| 26 | * where: |
| 27 | * Addr-type register length (1,2 or 4 bytes) |
| 28 | * Address absolute address of the register |
| 29 | * value value to be stored in the register |
| 30 | */ |
| 31 | |
| Jesse Taube | 7079eeb | 2024-02-19 18:00:59 -0500 | [diff] [blame] | 32 | /* |
| 33 | * 0x400AC044 is used to configure the flexram. |
| 34 | * Unfortunately setting all to OCRAM only works for MMC |
| 35 | * and setting all to DTCM only works for FLEXSPI NOR. |
| 36 | * This configuration fortunately works for both SPI and MMC. |
| 37 | */ |
| 38 | /* Set first two banks FlexRAM as OCRAM(01b) and the rest to DTCM(10b) */ |
| 39 | DATA 4 0x400AC044 0x55aaaaaa |
| Giulio Benetti | 8d9c076 | 2020-01-10 15:51:48 +0100 | [diff] [blame] | 40 | /* Use FLEXRAM_BANK_CFG to config FlexRAM */ |
| 41 | SET_BIT 4 0x400AC040 0x4 |