blob: 1001618f6352640a62667a614c09f5c59e2b7d78 [file] [log] [blame]
York Sun7288c2c2015-03-20 19:28:23 -07001CONFIG_ARM=y
Peng Fanabf8d962022-04-13 17:47:20 +08002CONFIG_COUNTER_FREQUENCY=25000000
Tom Rinib11dc332020-05-08 09:08:39 -04003CONFIG_GIC_V3_ITS=y
Prabhakar Kushwaha44937212015-11-09 16:42:07 +05304CONFIG_TARGET_LS2080ARDB=y
Tom Rini278b90c2018-02-03 12:10:38 -05005CONFIG_SYS_TEXT_BASE=0x30100000
Tom Rini98021542021-11-01 12:19:22 +00006CONFIG_SYS_MALLOC_LEN=0x202000
Tom Rini554e5512020-08-10 15:31:07 -04007CONFIG_NR_DRAM_BANKS=3
Tom Rinia09fea12019-11-18 20:02:10 -05008CONFIG_ENV_SIZE=0x2000
Tom Rinia09fea12019-11-18 20:02:10 -05009CONFIG_ENV_SECT_SIZE=0x20000
Tom Rinif7d0ae92020-07-28 08:46:52 -040010CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
Tom Rinidf59b7d2021-07-26 21:10:37 -040011CONFIG_FSL_USE_PCA9547_MUX=y
Tom Rinid06e4b72021-12-12 22:12:31 -050012CONFIG_VID=y
13CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv"
14CONFIG_VOL_MONITOR_IR36021_READ=y
15CONFIG_VOL_MONITOR_IR36021_SET=y
Tom Rinid43cd482022-03-30 18:07:32 -040016CONFIG_FSL_QIXIS=y
17# CONFIG_QIXIS_I2C_ACCESS is not set
Tom Rini2bba7802021-06-28 10:17:29 -040018CONFIG_FSL_LS_PPA=y
Tom Rinid46e86d2022-04-08 13:36:51 -040019CONFIG_ENV_ADDR=0x80300000
Tom Rinid168bcb2019-04-29 15:54:04 -040020CONFIG_AHCI=y
Tom Riniaca5cd22016-09-08 16:11:59 -040021# CONFIG_SYS_MALLOC_F is not set
Alper Nebi Yasaka8c281d2022-01-29 18:25:30 +030022CONFIG_REMAKE_ELF=y
Tom Rini54c5c2b2022-01-24 21:08:41 +000023CONFIG_MP=y
Simon Glass73223f02016-02-22 22:55:43 -070024CONFIG_FIT_VERBOSE=y
25CONFIG_OF_BOARD_SETUP=y
26CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini2f8a6db2021-12-14 13:36:40 -050027CONFIG_DYNAMIC_SYS_CLK_FREQ=y
Heiko Schocherbb597c02016-06-07 08:31:14 +020028CONFIG_BOOTDELAY=10
Sam Protsenko5abc1a42017-08-14 20:22:17 +030029CONFIG_USE_BOOTARGS=y
30CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
Tom Rini970bf862021-11-10 09:11:40 -050031CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;"
Adam Ford8ccf98b2018-07-29 13:13:29 -050032CONFIG_MISC_INIT_R=y
Tom Rini29cc2b52022-03-18 08:38:20 -040033CONFIG_RESET_PHY_R=y
Tuomas Tynkkynenad12dc12017-10-08 21:48:01 +030034CONFIG_CMD_IMLS=y
Tom Rini89cb2b52016-04-24 17:29:26 -040035CONFIG_CMD_GREPENV=y
Simon Glassa1dc9802017-05-17 03:25:10 -060036CONFIG_CMD_EEPROM=y
Tom Rini88cd7d02021-08-17 17:59:45 -040037CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
38CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Patrick Delaunayb331cd62017-01-27 11:00:42 +010039CONFIG_CMD_GPT=y
Tom Rini88663122017-08-14 19:58:53 -040040CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -040041CONFIG_CMD_MMC=y
Tom Rini8f1a80e2017-07-28 21:31:42 -040042CONFIG_CMD_NAND=y
Simon Glass6500ec72017-08-04 16:34:34 -060043CONFIG_CMD_PCI=y
Tom Rini88663122017-08-14 19:58:53 -040044CONFIG_CMD_USB=y
Joe Hershbergeref0f2f52015-06-22 16:15:30 -050045# CONFIG_CMD_SETEXPR is not set
Tom Rini89cb2b52016-04-24 17:29:26 -040046CONFIG_CMD_CACHE=y
Chris Packhamc9032ce2017-04-29 15:20:28 +120047CONFIG_CMD_DATE=y
Haikun.Wang@freescale.com25195602015-07-03 16:51:36 +080048CONFIG_OF_CONTROL=y
Adam Forde91907a2020-07-03 06:48:56 -050049CONFIG_ENV_OVERWRITE=y
Tom Rini5dc4dfd2017-08-28 07:16:32 -040050CONFIG_ENV_IS_IN_FLASH=y
Tom Rini0e14cdf2022-03-11 09:12:07 -050051CONFIG_USE_ETHPRIME=y
52CONFIG_ETHPRIME="DPMAC1@xgmii"
Prabhakar Kushwaha2bc3b2e2015-10-07 16:30:12 +053053CONFIG_NET_RANDOM_ETHADDR=y
Haikun.Wang@freescale.com25195602015-07-03 16:51:36 +080054CONFIG_DM=y
Simon Glass6edb5dd2022-01-31 07:49:33 -070055CONFIG_SATA=y
Peng Ma71037f62018-10-22 10:43:22 +080056CONFIG_SATA_CEVA=y
Tom Rini28522672017-03-01 16:51:58 -050057CONFIG_FSL_CAAM=y
Tom Riniefb5dab72021-08-21 13:50:17 -040058CONFIG_DDR_CLK_FREQ=133333333
Tom Rini388de0f2022-03-30 18:07:31 -040059CONFIG_DIMM_SLOTS_PER_CTLR=2
Tom Rini95372162021-08-21 13:50:18 -040060CONFIG_DDR_ECC=y
61CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rini55dabcc2021-08-18 23:12:24 -040062CONFIG_SYS_I2C_LEGACY=y
Tom Rini88cd7d02021-08-17 17:59:45 -040063CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Mario Six07dea2e2018-03-28 14:38:19 +020064CONFIG_FSL_ESDHC=y
Tom Rini0cfccb52019-12-04 17:18:38 -050065CONFIG_MTD=y
Masahiro Yamadae856bdc2017-02-11 22:43:54 +090066CONFIG_MTD_NOR_FLASH=y
Adam Ford2fe88d42018-10-14 15:10:50 -050067CONFIG_FLASH_CFI_DRIVER=y
68CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
69CONFIG_SYS_FLASH_CFI=y
Tom Rini0cfccb52019-12-04 17:18:38 -050070CONFIG_MTD_RAW_NAND=y
Tom Rini53f06132021-09-22 14:50:37 -040071CONFIG_NAND_FSL_IFC=y
Tom Rinic0ad62c2021-09-22 14:50:34 -040072CONFIG_SYS_NAND_ONFI_DETECTION=y
Tom Riniaca5cd22016-09-08 16:11:59 -040073CONFIG_DM_SPI_FLASH=y
Tom Rinif76750d2021-12-11 14:55:51 -050074CONFIG_SPI_FLASH_STMICRO=y
Alexandru Gagniuc3146f0c2017-08-01 17:19:59 -070075CONFIG_PHYLIB=y
Jeremy Gebben1c650102018-09-18 15:49:35 -060076CONFIG_PHY_AQUANTIA=y
Tom Rini60f3c012019-11-26 17:32:42 -050077CONFIG_PHY_CORTINA=y
Kuldeep Singhe99b1df2021-08-10 11:20:07 +053078CONFIG_CORTINA_FW_ADDR=0x580980000
Simon Glassa77fda12015-08-19 09:33:43 -060079CONFIG_E1000=y
Adam Fordd7869b22018-07-20 23:03:57 -050080CONFIG_MII=y
Mark Kettenis045474b2022-01-22 20:38:11 +010081CONFIG_NVME_PCI=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +010082CONFIG_PCI=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +010083CONFIG_DM_PCI_COMPAT=y
Hou Zhiqianged188aa2020-07-09 23:31:42 +080084CONFIG_PCIE_LAYERSCAPE_RC=y
Peng Ma71037f62018-10-22 10:43:22 +080085CONFIG_DM_SCSI=y
Tom Rini6f6b7cf2018-03-06 19:02:27 -050086CONFIG_CONS_INDEX=2
Thomas Chou9e390032015-11-19 21:48:14 +080087CONFIG_SYS_NS16550=y
Adam Fordf1b1f772018-04-15 13:51:26 -040088CONFIG_SPI=y
Tom Riniaca5cd22016-09-08 16:11:59 -040089CONFIG_DM_SPI=y
Haikun.Wang@freescale.com25195602015-07-03 16:51:36 +080090CONFIG_FSL_DSPI=y
Masahiro Yamada0a8cc1a2016-06-04 07:35:03 +090091CONFIG_USB=y
92CONFIG_USB_XHCI_HCD=y
Masahiro Yamada10db7502016-06-04 07:35:04 +090093CONFIG_USB_XHCI_DWC3=y