Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
Masahiro Yamada | 7865f4b | 2015-04-21 20:38:20 +0900 | [diff] [blame] | 2 | CONFIG_ARCH_SOCFPGA=y |
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 4 | CONFIG_SPL_DM=y |
5 | CONFIG_DM_GPIO=y | ||||
Marek Vasut | cd9b731 | 2015-08-02 21:57:57 +0200 | [diff] [blame] | 6 | CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y |
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 7 | CONFIG_SPL_STACK_R_ADDR=0x00800000 |
Joe Hershberger | bd328eb | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" |
9 | CONFIG_SPL=y | ||||
Simon Glass | b880fcf | 2015-08-19 09:33:42 -0600 | [diff] [blame] | 10 | CONFIG_SPL_STACK_R=y |
Simon Glass | 73223f0 | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 11 | CONFIG_FIT=y |
Tom Rini | adad96e | 2016-04-21 21:37:19 -0400 | [diff] [blame^] | 12 | CONFIG_HUSH_PARSER=y |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 13 | # CONFIG_CMD_IMLS is not set |
14 | # CONFIG_CMD_FLASH is not set | ||||
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 15 | CONFIG_CMD_GPIO=y |
Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 16 | CONFIG_SPL_DM_SEQ_ALIAS=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 17 | CONFIG_DWAPB_GPIO=y |
Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 18 | CONFIG_DM_MMC=y |
Joe Hershberger | c9bb942 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 19 | CONFIG_SPI_FLASH=y |
Tom Rini | adad96e | 2016-04-21 21:37:19 -0400 | [diff] [blame^] | 20 | CONFIG_SPI_FLASH_BAR=y |
Bin Meng | 68d5342 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 21 | CONFIG_SPI_FLASH_SPANSION=y |
22 | CONFIG_SPI_FLASH_STMICRO=y | ||||
Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 23 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
Marek Vasut | e14d3f7 | 2015-07-25 18:47:02 +0200 | [diff] [blame] | 24 | CONFIG_DM_ETH=y |
Joe Hershberger | bd328eb | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 25 | CONFIG_ETH_DESIGNWARE=y |
Thomas Chou | 9e39003 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 26 | CONFIG_SYS_NS16550=y |
Bin Meng | e5d5d44 | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 27 | CONFIG_CADENCE_QSPI=y |
28 | CONFIG_DESIGNWARE_SPI=y | ||||
Marek Vasut | c90ada9 | 2015-12-05 19:24:22 +0100 | [diff] [blame] | 29 | CONFIG_USB=y |
30 | CONFIG_DM_USB=y | ||||
Sam Protsenko | f9d0fd8 | 2016-03-25 16:39:47 +0200 | [diff] [blame] | 31 | CONFIG_USB_GADGET=y |
Sam Protsenko | 3457bba | 2016-04-13 14:20:25 +0300 | [diff] [blame] | 32 | CONFIG_USB_GADGET_DWC2_OTG=y |
Sam Protsenko | aaa4a9e | 2016-04-13 14:20:26 +0300 | [diff] [blame] | 33 | CONFIG_USB_GADGET_DOWNLOAD=y |
Sam Protsenko | e6c0bc0 | 2016-04-13 14:20:30 +0300 | [diff] [blame] | 34 | CONFIG_G_DNL_MANUFACTURER="altera" |
35 | CONFIG_G_DNL_VENDOR_NUM=0x0525 | ||||
36 | CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 |