blob: 871e87c26d015a7e600e052bd29a5a799567a1c1 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese0299c902015-10-20 15:14:47 +02002/*
3 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
Stefan Roese0299c902015-10-20 15:14:47 +02004 */
5
6#ifndef _CONFIG_CLEARFOG_H
7#define _CONFIG_CLEARFOG_H
8
Simon Glass1af3c7f2020-05-10 11:40:09 -06009#include <linux/stringify.h>
10
Stefan Roese0299c902015-10-20 15:14:47 +020011/*
12 * High Level Configuration Options (easy to change)
13 */
Stefan Roese0299c902015-10-20 15:14:47 +020014
Stefan Roese0299c902015-10-20 15:14:47 +020015/*
16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
17 * for DDR ECC byte filling in the SPL before loading the main
18 * U-Boot into it.
19 */
Stefan Roese0299c902015-10-20 15:14:47 +020020
Stefan Roese0299c902015-10-20 15:14:47 +020021#define CONFIG_ENV_MIN_ENTRIES 128
22
23/* Environment in MMC */
Stefan Roese0299c902015-10-20 15:14:47 +020024/*
25 * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
26 * boot image starts @ LBA-0.
27 * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
28 * image and environment
29 */
Stefan Roese0299c902015-10-20 15:14:47 +020030
Stefan Roese0299c902015-10-20 15:14:47 +020031#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
32
33/* PCIe support */
34#ifndef CONFIG_SPL_BUILD
Stefan Roese0299c902015-10-20 15:14:47 +020035#define CONFIG_PCI_SCAN_SHOW
36#endif
37
Stefan Roese0299c902015-10-20 15:14:47 +020038/* Keep device tree and initrd in lower memory so the kernel can access them */
Patrick Wildtf3d9ec22017-05-10 15:12:34 +020039#define RELOCATION_LIMITS_ENV_SETTINGS \
Stefan Roese0299c902015-10-20 15:14:47 +020040 "fdt_high=0x10000000\0" \
41 "initrd_high=0x10000000\0"
42
43/* SPL */
Stefan Roese0299c902015-10-20 15:14:47 +020044
45/* Defines for SPL */
Stefan Roese0299c902015-10-20 15:14:47 +020046#define CONFIG_SPL_SIZE (140 << 10)
Pali Rohár1dcbcc72022-01-12 18:32:08 +010047#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - (CONFIG_SPL_TEXT_BASE - 0x40000000))
Stefan Roese0299c902015-10-20 15:14:47 +020048
49#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
50#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
51
52#ifdef CONFIG_SPL_BUILD
53#define CONFIG_SYS_MALLOC_SIMPLE
54#endif
55
56#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
57#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
58
Pali Rohár2a85fda2021-07-23 11:14:32 +020059#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
Stefan Roese0299c902015-10-20 15:14:47 +020060/* SPL related MMC defines */
Stefan Roese0299c902015-10-20 15:14:47 +020061#ifdef CONFIG_SPL_BUILD
62#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
63#endif
64#endif
65
Stefan Roese0299c902015-10-20 15:14:47 +020066/*
67 * mv-common.h should be defined after CMD configs since it used them
68 * to enable certain macros
69 */
70#include "mv-common.h"
71
Patrick Wildtf3d9ec22017-05-10 15:12:34 +020072/* Include the common distro boot environment */
73#ifndef CONFIG_SPL_BUILD
Patrick Wildtf3d9ec22017-05-10 15:12:34 +020074
75#ifdef CONFIG_MMC
76#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
77#else
78#define BOOT_TARGET_DEVICES_MMC(func)
79#endif
80
81#ifdef CONFIG_USB_STORAGE
82#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
83#else
84#define BOOT_TARGET_DEVICES_USB(func)
85#endif
86
Joel Johnsoncecf38a2020-03-23 11:26:32 -060087#ifndef CONFIG_SCSI
88#define BOOT_TARGET_DEVICES_SCSI_BUS0(func)
89#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
90#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
Joel Johnsonbd02fd22020-03-23 11:26:31 -060091#else
Joel Johnsoncecf38a2020-03-23 11:26:32 -060092/*
93 * With SCSI enabled, M.2 SATA is always located on bus 0
94 */
95#define BOOT_TARGET_DEVICES_SCSI_BUS0(func) func(SCSI, scsi, 0)
96
97/*
98 * Either one or both mPCIe slots may be configured as mSATA interfaces. The
99 * SCSI bus ids are assigned based on sequence of hardware present, not always
100 * tied to hardware slot ids. As such, use second SCSI bus if either slot is
101 * set for SATA, and only use third SCSI bus if both slots are SATA enabled.
102 */
103#if defined (CONFIG_CLEARFOG_CON2_SATA) || defined (CONFIG_CLEARFOG_CON3_SATA)
104#define BOOT_TARGET_DEVICES_SCSI_BUS1(func) func(SCSI, scsi, 1)
105#else
106#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
Joel Johnsonbd02fd22020-03-23 11:26:31 -0600107#endif
108
Joel Johnsoncecf38a2020-03-23 11:26:32 -0600109#if defined (CONFIG_CLEARFOG_CON2_SATA) && defined (CONFIG_CLEARFOG_CON3_SATA)
110#define BOOT_TARGET_DEVICES_SCSI_BUS2(func) func(SCSI, scsi, 2)
111#else
112#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
113#endif
114
115#endif /* CONFIG_SCSI */
116
117/*
118 * The SCSI buses are attempted in increasing bus order, there is no current
119 * mechanism to alter the default bus priority order for booting.
120 */
Patrick Wildtf3d9ec22017-05-10 15:12:34 +0200121#define BOOT_TARGET_DEVICES(func) \
122 BOOT_TARGET_DEVICES_MMC(func) \
123 BOOT_TARGET_DEVICES_USB(func) \
Joel Johnsoncecf38a2020-03-23 11:26:32 -0600124 BOOT_TARGET_DEVICES_SCSI_BUS0(func) \
125 BOOT_TARGET_DEVICES_SCSI_BUS1(func) \
126 BOOT_TARGET_DEVICES_SCSI_BUS2(func) \
Patrick Wildtf3d9ec22017-05-10 15:12:34 +0200127 func(PXE, pxe, na) \
128 func(DHCP, dhcp, na)
129
130#define KERNEL_ADDR_R __stringify(0x800000)
131#define FDT_ADDR_R __stringify(0x100000)
132#define RAMDISK_ADDR_R __stringify(0x1800000)
133#define SCRIPT_ADDR_R __stringify(0x200000)
134#define PXEFILE_ADDR_R __stringify(0x300000)
135
136#define LOAD_ADDRESS_ENV_SETTINGS \
137 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
138 "fdt_addr_r=" FDT_ADDR_R "\0" \
139 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
140 "scriptaddr=" SCRIPT_ADDR_R "\0" \
141 "pxefile_addr_r=" PXEFILE_ADDR_R "\0"
142
143#include <config_distro_bootcmd.h>
144
145#define CONFIG_EXTRA_ENV_SETTINGS \
146 RELOCATION_LIMITS_ENV_SETTINGS \
147 LOAD_ADDRESS_ENV_SETTINGS \
Patrick Wildtf3d9ec22017-05-10 15:12:34 +0200148 "console=ttyS0,115200\0" \
149 BOOTENV
150
151#endif /* CONFIG_SPL_BUILD */
152
Stefan Roese0299c902015-10-20 15:14:47 +0200153#endif /* _CONFIG_CLEARFOG_H */