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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -04002/*
Enric Balletbò i Serradc7a9e62012-03-05 11:32:16 +00003 * Common configuration settings for IGEP technology based boards
4 *
5 * (C) Copyright 2012
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -04006 * ISEE 2007 SL, <www.iseebcn.com>
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -04007 */
8
Enric Balletbò i Serradc7a9e62012-03-05 11:32:16 +00009#ifndef __IGEP00X0_H
10#define __IGEP00X0_H
11
Enric Balletbò i Serrae37e9542013-12-06 21:30:24 +010012#include <configs/ti_omap3_common.h>
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -040013
Tom Rinifa2f81b2016-08-26 13:30:43 -040014/*
15 * We are only ever GP parts and will utilize all of the "downloaded image"
16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
17 */
Enric Balletbo i Serrae7fbcbc2016-05-03 08:59:24 +020018
Pau Pajuelo195dc232017-08-17 03:09:14 +020019/* TPS65950 */
20#define PBIASLITEVMODE1 (1 << 8)
21
22/* LED */
23#define IGEP0020_GPIO_LED 27
24#define IGEP0030_GPIO_LED 16
25
26/* Board and revision detection GPIOs */
27#define IGEP0030_USB_TRANSCEIVER_RESET 54
28#define GPIO_IGEP00X0_BOARD_DETECTION 28
29#define GPIO_IGEP00X0_REVISION_DETECTION 129
Javier Martinez Canillas9d4f5422012-12-27 03:36:01 +000030
Enric Balletbò i Serra40372242015-09-07 08:28:09 +020031#ifndef CONFIG_SPL_BUILD
Enric Balletbo i Serra304a46c2011-04-19 09:16:36 -040032
Enric Balletbò i Serra40372242015-09-07 08:28:09 +020033/* Environment */
34#define ENV_DEVICE_SETTINGS \
35 "stdin=serial\0" \
36 "stdout=serial\0" \
37 "stderr=serial\0"
38
39#define MEM_LAYOUT_SETTINGS \
40 DEFAULT_LINUX_BOOT_ENV \
41 "scriptaddr=0x87E00000\0" \
42 "pxefile_addr_r=0x87F00000\0"
43
44#define BOOT_TARGET_DEVICES(func) \
45 func(MMC, mmc, 0)
46
47#include <config_distro_bootcmd.h>
48
Pau Pajuelo195dc232017-08-17 03:09:14 +020049#define ENV_FINDFDT \
50 "findfdt="\
51 "if test ${board_name} = igep0020; then " \
52 "if test ${board_rev} = F; then " \
53 "setenv fdtfile omap3-igep0020-rev-f.dtb; " \
54 "else " \
55 "setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
56 "if test ${board_name} = igep0030; then " \
57 "if test ${board_rev} = G; then " \
58 "setenv fdtfile omap3-igep0030-rev-g.dtb; " \
59 "else " \
60 "setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
61 "if test ${fdtfile} = ''; then " \
62 "echo WARNING: Could not determine device tree to use; fi; \0"
63
Enric Balletbò i Serra40372242015-09-07 08:28:09 +020064#define CONFIG_EXTRA_ENV_SETTINGS \
Pau Pajuelo195dc232017-08-17 03:09:14 +020065 ENV_FINDFDT \
Enric Balletbò i Serra40372242015-09-07 08:28:09 +020066 ENV_DEVICE_SETTINGS \
67 MEM_LAYOUT_SETTINGS \
68 BOOTENV
69
70#endif
Enric Balletbo i Serra8a3f6bb2010-10-14 16:54:59 -040071
Ladislav Michl4b9dc7c2016-07-12 20:28:32 +020072/* OneNAND config */
Ladislav Michl4b9dc7c2016-07-12 20:28:32 +020073#define CONFIG_USE_ONENAND_BOARD_INIT
74#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
75#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
Javier Martinez Canillasd271a612012-07-28 01:19:34 +000076
Ladislav Michl4b9dc7c2016-07-12 20:28:32 +020077/* NAND config */
Ladislav Michl81fd8582015-10-12 18:09:14 +020078#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
79 10, 11, 12, 13, 14, 15, 16, 17, \
80 18, 19, 20, 21, 22, 23, 24, 25, \
81 26, 27, 28, 29, 30, 31, 32, 33, \
82 34, 35, 36, 37, 38, 39, 40, 41, \
83 42, 43, 44, 45, 46, 47, 48, 49, \
84 50, 51, 52, 53, 54, 55, 56, 57, }
Javier Martinez Canillasd271a612012-07-28 01:19:34 +000085#define CONFIG_SYS_NAND_ECCSIZE 512
Ladislav Michl81fd8582015-10-12 18:09:14 +020086#define CONFIG_SYS_NAND_ECCBYTES 14
Ladislav Michl81fd8582015-10-12 18:09:14 +020087
Enric Balletbò i Serradc7a9e62012-03-05 11:32:16 +000088#endif /* __IGEP00X0_H */