| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 2 | /* |
| 3 | * include/configs/gose.h |
| 4 | * |
| 5 | * Copyright (C) 2014 Renesas Electronics Corporation |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __GOSE_H |
| 9 | #define __GOSE_H |
| 10 | |
| Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 11 | #include "rcar-gen2-common.h" |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 12 | |
| Marek Vasut | 49aefe3 | 2018-04-23 20:24:10 +0200 | [diff] [blame] | 13 | #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 |
| 14 | #define STACK_AREA_SIZE 0x00100000 |
| 15 | #define LOW_LEVEL_MERAM_STACK \ |
| 16 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 17 | |
| 18 | /* MEMORY */ |
| Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 19 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| Marek Vasut | 49aefe3 | 2018-04-23 20:24:10 +0200 | [diff] [blame] | 20 | #define RCAR_GEN2_SDRAM_SIZE (1048u * 1024 * 1024) |
| 21 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024) |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 22 | |
| Nobuhiro Iwamatsu | f026124 | 2014-11-06 15:42:24 +0900 | [diff] [blame] | 23 | /* SH Ether */ |
| Nobuhiro Iwamatsu | f026124 | 2014-11-06 15:42:24 +0900 | [diff] [blame] | 24 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 25 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 |
| 26 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII |
| 27 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 28 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE |
| Marek Vasut | 49aefe3 | 2018-04-23 20:24:10 +0200 | [diff] [blame] | 29 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 |
| Nobuhiro Iwamatsu | f026124 | 2014-11-06 15:42:24 +0900 | [diff] [blame] | 30 | #define CONFIG_BITBANGMII |
| 31 | #define CONFIG_BITBANGMII_MULTI |
| Nobuhiro Iwamatsu | f026124 | 2014-11-06 15:42:24 +0900 | [diff] [blame] | 32 | |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 33 | /* Board Clock */ |
| 34 | #define RMOBILE_XTAL_CLK 20000000u |
| 35 | #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK |
| 36 | #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) |
| Marek Vasut | 49aefe3 | 2018-04-23 20:24:10 +0200 | [diff] [blame] | 37 | |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 38 | |
| Marek Vasut | 49aefe3 | 2018-04-23 20:24:10 +0200 | [diff] [blame] | 39 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 40 | "fdt_high=0xffffffff\0" \ |
| 41 | "initrd_high=0xffffffff\0" |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 42 | |
| Marek Vasut | 49aefe3 | 2018-04-23 20:24:10 +0200 | [diff] [blame] | 43 | /* SPL support */ |
| 44 | #define CONFIG_SPL_TEXT_BASE 0xe6300000 |
| 45 | #define CONFIG_SPL_STACK 0xe6340000 |
| 46 | #define CONFIG_SPL_MAX_SIZE 0x4000 |
| 47 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 |
| 48 | #ifdef CONFIG_SPL_BUILD |
| 49 | #define CONFIG_CONS_SCIF0 |
| 50 | #define CONFIG_SH_SCIF_CLK_FREQ 65000000 |
| 51 | #endif |
| Nobuhiro Iwamatsu | e2abab6 | 2014-11-12 11:29:39 +0900 | [diff] [blame] | 52 | |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 53 | #endif /* __GOSE_H */ |