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Vikas Manocha6a12ceb2016-02-11 15:47:19 -08001/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02002 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha6a12ceb2016-02-11 15:47:19 -08004 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
Vikas Manochafd03b832017-02-12 10:25:46 -08009#include <clk.h>
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080010#include <dm.h>
11#include <asm/io.h>
12#include <serial.h>
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090013#include <asm/arch/stm32.h>
Patrice Chotardae74de02018-01-12 09:23:49 +010014#include "serial_stm32.h"
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080015
16DECLARE_GLOBAL_DATA_PTR;
17
18static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
19{
Patrice Chotard60a996b2017-09-27 15:44:50 +020020 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
21 bool stm32f4 = plat->uart_info->stm32f4;
22 fdt_addr_t base = plat->base;
Patrice Chotard27265ce2017-07-18 09:29:08 +020023 u32 int_div, mantissa, fraction, oversampling;
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090024
Patrice Chotard27265ce2017-07-18 09:29:08 +020025 int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020026
27 if (int_div < 16) {
28 oversampling = 8;
Patrice Chotard60a996b2017-09-27 15:44:50 +020029 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020030 } else {
31 oversampling = 16;
Patrice Chotard60a996b2017-09-27 15:44:50 +020032 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020033 }
34
35 mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
36 fraction = int_div % oversampling;
37
Patrice Chotard60a996b2017-09-27 15:44:50 +020038 writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080039
40 return 0;
41}
42
43static int stm32_serial_getc(struct udevice *dev)
44{
Patrice Chotard60a996b2017-09-27 15:44:50 +020045 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
46 bool stm32f4 = plat->uart_info->stm32f4;
47 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080048
Patrice Chotard60a996b2017-09-27 15:44:50 +020049 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080050 return -EAGAIN;
51
Patrice Chotard60a996b2017-09-27 15:44:50 +020052 return readl(base + RDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080053}
54
55static int stm32_serial_putc(struct udevice *dev, const char c)
56{
Patrice Chotard60a996b2017-09-27 15:44:50 +020057 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
58 bool stm32f4 = plat->uart_info->stm32f4;
59 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080060
Patrice Chotard60a996b2017-09-27 15:44:50 +020061 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080062 return -EAGAIN;
63
Patrice Chotard60a996b2017-09-27 15:44:50 +020064 writel(c, base + TDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080065
66 return 0;
67}
68
69static int stm32_serial_pending(struct udevice *dev, bool input)
70{
Patrice Chotard60a996b2017-09-27 15:44:50 +020071 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
72 bool stm32f4 = plat->uart_info->stm32f4;
73 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080074
75 if (input)
Patrice Chotard60a996b2017-09-27 15:44:50 +020076 return readl(base + ISR_OFFSET(stm32f4)) &
77 USART_SR_FLAG_RXNE ? 1 : 0;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080078 else
Patrice Chotard60a996b2017-09-27 15:44:50 +020079 return readl(base + ISR_OFFSET(stm32f4)) &
80 USART_SR_FLAG_TXE ? 0 : 1;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080081}
82
83static int stm32_serial_probe(struct udevice *dev)
84{
Patrice Chotard60a996b2017-09-27 15:44:50 +020085 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
Patrice Chotard9a212d72017-09-27 15:44:53 +020086 struct clk clk;
Patrice Chotard60a996b2017-09-27 15:44:50 +020087 fdt_addr_t base = plat->base;
Patrice Chotard9a212d72017-09-27 15:44:53 +020088 int ret;
Patrice Chotard60a996b2017-09-27 15:44:50 +020089 bool stm32f4;
90 u8 uart_enable_bit;
91
92 plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
93 stm32f4 = plat->uart_info->stm32f4;
94 uart_enable_bit = plat->uart_info->uart_enable_bit;
Vikas Manochafd03b832017-02-12 10:25:46 -080095
Vikas Manochafd03b832017-02-12 10:25:46 -080096 ret = clk_get_by_index(dev, 0, &clk);
97 if (ret < 0)
98 return ret;
99
100 ret = clk_enable(&clk);
101 if (ret) {
102 dev_err(dev, "failed to enable clock\n");
103 return ret;
104 }
Vikas Manochafd03b832017-02-12 10:25:46 -0800105
Patrice Chotard27265ce2017-07-18 09:29:08 +0200106 plat->clock_rate = clk_get_rate(&clk);
107 if (plat->clock_rate < 0) {
108 clk_disable(&clk);
109 return plat->clock_rate;
110 };
111
Patrice Chotard60a996b2017-09-27 15:44:50 +0200112 /* Disable uart-> disable overrun-> enable uart */
113 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
114 BIT(uart_enable_bit));
115 if (plat->uart_info->has_overrun_disable)
116 setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS);
Patrice Chotard2a7ecc52017-09-27 15:44:51 +0200117 if (plat->uart_info->has_fifo)
118 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
Patrice Chotard60a996b2017-09-27 15:44:50 +0200119 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
120 BIT(uart_enable_bit));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800121
122 return 0;
123}
124
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800125static const struct udevice_id stm32_serial_id[] = {
Patrice Chotard6c30f152017-09-27 15:44:52 +0200126 { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
Patrice Chotard2a7ecc52017-09-27 15:44:51 +0200127 { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
128 { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800129 {}
130};
131
132static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
133{
134 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800135
Patrice Chotard60a996b2017-09-27 15:44:50 +0200136 plat->base = devfdt_get_addr(dev);
137 if (plat->base == FDT_ADDR_T_NONE)
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800138 return -EINVAL;
139
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800140 return 0;
141}
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800142
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800143static const struct dm_serial_ops stm32_serial_ops = {
144 .putc = stm32_serial_putc,
145 .pending = stm32_serial_pending,
146 .getc = stm32_serial_getc,
147 .setbrg = stm32_serial_setbrg,
148};
149
150U_BOOT_DRIVER(serial_stm32) = {
Patrice Chotardae74de02018-01-12 09:23:49 +0100151 .name = "serial_stm32",
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800152 .id = UCLASS_SERIAL,
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800153 .of_match = of_match_ptr(stm32_serial_id),
154 .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
155 .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800156 .ops = &stm32_serial_ops,
157 .probe = stm32_serial_probe,
158 .flags = DM_FLAG_PRE_RELOC,
159};