blob: 0e94b84fe6573a0cfdb417e1e5573be130081aab [file] [log] [blame]
Trevor Woerner18138ab2020-05-06 08:02:41 -04001if ARCH_TEGRA
Masahiro Yamadaddd960e2014-08-31 07:10:56 +09002
Simon Glass83061db2021-07-10 21:14:30 -06003config SPL_GPIO
Simon Glass53b5bf32016-09-12 23:18:39 -06004 default y
5
Simon Glass77d2f7f2016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glasscc4288e2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glass2a736062021-08-08 12:20:12 -060012config SPL_SERIAL
Simon Glasse00f76c2016-09-12 23:18:56 -060013 default y
14
Thierry Redingb64e0b92019-04-15 11:32:18 +020015config TEGRA_CLKRST
16 bool
17
Svyatoslav Ryhel8ed2bd12023-02-14 19:35:35 +020018config TEGRA_CRYPTO
19 bool "Tegra AES128 crypto module"
20 select AES
Svyatoslav Ryhel8ed2bd12023-02-14 19:35:35 +020021
Thierry Reding9e578192019-04-15 11:32:19 +020022config TEGRA_GP_PADCTRL
23 bool
24
Stephen Warren49626ea2016-07-18 12:17:11 -060025config TEGRA_IVC
26 bool "Tegra IVC protocol"
27 help
28 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
29 (Inter Processor Communication) framework. Within the context of
30 U-Boot, it is typically used for communication between the main CPU
31 and various auxiliary processors.
32
Thierry Reding1a869c72019-04-15 11:32:20 +020033config TEGRA_MC
34 bool
35
Thierry Reding07ea02b2019-04-15 11:32:21 +020036config TEGRA_PINCTRL
37 bool
38
Thierry Redinge19143b2019-04-15 11:32:22 +020039config TEGRA_PMC
40 bool
41
Thierry Redingf9ec2ec2019-04-15 11:32:25 +020042config TEGRA_PMC_SECURE
43 bool
44 depends on TEGRA_PMC
45
Stephen Warren15bcc622015-11-23 10:32:01 -070046config TEGRA_COMMON
47 bool "Tegra common options"
Michal Simek5ed063d2018-07-23 15:55:13 +020048 select BOARD_EARLY_INIT_F
Stephen Warren140a9ea2016-09-13 10:46:00 -060049 select CLK
Tom Warren56079ec2015-07-17 08:12:51 -070050 select DM
Tom Warren56079ec2015-07-17 08:12:51 -070051 select DM_GPIO
Stephen Warren15bcc622015-11-23 10:32:01 -070052 select DM_I2C
Simon Glassf77f5e92015-10-18 21:17:16 -060053 select DM_KEYBOARD
Tom Warren6a474db2016-09-13 10:45:48 -060054 select DM_MMC
Simon Glass91c08af2016-01-30 16:38:01 -070055 select DM_PWM
Stephen Warren140a9ea2016-09-13 10:46:00 -060056 select DM_RESET
Stephen Warren15bcc622015-11-23 10:32:01 -070057 select DM_SERIAL
58 select DM_SPI
59 select DM_SPI_FLASH
Stephen Warren140a9ea2016-09-13 10:46:00 -060060 select MISC
Stephen Warren15bcc622015-11-23 10:32:01 -070061 select OF_CONTROL
Michal Simek5ed063d2018-07-23 15:55:13 +020062 select SPI
Michal Simek08a00cb2018-07-23 15:55:14 +020063 imply CMD_DM
Daniel Thompson221a9492017-05-19 17:26:58 +010064 imply CRC32_VERIFY
Stephen Warren15bcc622015-11-23 10:32:01 -070065
Stephen Warren140a9ea2016-09-13 10:46:00 -060066config TEGRA_NO_BPMP
67 bool "Tegra common options for SoCs without BPMP"
68 select TEGRA_CAR
69 select TEGRA_CAR_CLOCK
70 select TEGRA_CAR_RESET
71
Stephen Warren15bcc622015-11-23 10:32:01 -070072config TEGRA_ARMV7_COMMON
73 bool "Tegra 32-bit common options"
Simon Glass30770262020-07-19 13:56:00 -060074 select BINMAN
Lokesh Vutlaacf15002018-04-26 18:21:26 +053075 select CPU_V7A
Stephen Warren15bcc622015-11-23 10:32:01 -070076 select SPL
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080077 select SPL_BOARD_INIT if SPL
Tom Rinia2ac2b92021-08-27 21:18:30 -040078 select SPL_SKIP_LOWLEVEL_INIT_ONLY if SPL
Stephen Warren15bcc622015-11-23 10:32:01 -070079 select SUPPORT_SPL
Svyatoslav Ryhel412a4c62023-02-01 10:53:03 +020080 select TIMER
Thierry Redingb64e0b92019-04-15 11:32:18 +020081 select TEGRA_CLKRST
Stephen Warren15bcc622015-11-23 10:32:01 -070082 select TEGRA_COMMON
Stephen Warren601800b2016-05-12 12:07:41 -060083 select TEGRA_GPIO
Thierry Reding9e578192019-04-15 11:32:19 +020084 select TEGRA_GP_PADCTRL
Thierry Reding1a869c72019-04-15 11:32:20 +020085 select TEGRA_MC
Stephen Warren140a9ea2016-09-13 10:46:00 -060086 select TEGRA_NO_BPMP
Thierry Reding07ea02b2019-04-15 11:32:21 +020087 select TEGRA_PINCTRL
Thierry Redinge19143b2019-04-15 11:32:22 +020088 select TEGRA_PMC
Svyatoslav Ryhel412a4c62023-02-01 10:53:03 +020089 select TEGRA_TIMER
Stephen Warren15bcc622015-11-23 10:32:01 -070090
91config TEGRA_ARMV8_COMMON
92 bool "Tegra 64-bit common options"
93 select ARM64
Masahiro Yamada382de4a2019-06-26 13:51:46 +090094 select INIT_SP_RELATIVE
Stephen Warrenddecaaf2018-01-03 14:31:52 -070095 select LINUX_KERNEL_IMAGE_HEADER
Thierry Reding74a50ac2019-04-15 11:32:32 +020096 select POSITION_INDEPENDENT
Stephen Warren15bcc622015-11-23 10:32:01 -070097 select TEGRA_COMMON
Tom Warren56079ec2015-07-17 08:12:51 -070098
Stephen Warrenddecaaf2018-01-03 14:31:52 -070099if TEGRA_ARMV8_COMMON
100config LNX_KRNL_IMG_TEXT_OFFSET_BASE
101 default 0x80000000
102endif
103
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900104choice
105 prompt "Tegra SoC select"
Joe Hershbergera26cd042015-05-12 14:46:23 -0500106 optional
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900107
108config TEGRA20
109 bool "Tegra20 family"
Tom Rini8dda2e22017-03-07 07:13:42 -0500110 select ARM_ERRATA_716044
111 select ARM_ERRATA_742230
112 select ARM_ERRATA_751472
Tom Warren56079ec2015-07-17 08:12:51 -0700113 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900114
115config TEGRA30
116 bool "Tegra30 family"
Tom Rini8dda2e22017-03-07 07:13:42 -0500117 select ARM_ERRATA_743622
118 select ARM_ERRATA_751472
Tom Warren56079ec2015-07-17 08:12:51 -0700119 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900120
121config TEGRA114
122 bool "Tegra114 family"
Tom Warren56079ec2015-07-17 08:12:51 -0700123 select TEGRA_ARMV7_COMMON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900124
125config TEGRA124
126 bool "Tegra124 family"
Tom Warren56079ec2015-07-17 08:12:51 -0700127 select TEGRA_ARMV7_COMMON
Simon Glass66de3ee2017-07-25 08:29:58 -0600128 imply REGMAP
129 imply SYSCON
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900130
Tom Warren7aaa5a62015-03-04 16:36:00 -0700131config TEGRA210
132 bool "Tegra210 family"
Tom Rini5afdcca2021-08-19 14:19:39 -0400133 select GICV2
Svyatoslav Ryhel412a4c62023-02-01 10:53:03 +0200134 select TIMER
Stephen Warren15bcc622015-11-23 10:32:01 -0700135 select TEGRA_ARMV8_COMMON
Thierry Redingb64e0b92019-04-15 11:32:18 +0200136 select TEGRA_CLKRST
Michal Simek5ed063d2018-07-23 15:55:13 +0200137 select TEGRA_GPIO
Thierry Reding9e578192019-04-15 11:32:19 +0200138 select TEGRA_GP_PADCTRL
Thierry Reding1a869c72019-04-15 11:32:20 +0200139 select TEGRA_MC
Stephen Warren140a9ea2016-09-13 10:46:00 -0600140 select TEGRA_NO_BPMP
Thierry Reding07ea02b2019-04-15 11:32:21 +0200141 select TEGRA_PINCTRL
Thierry Redinge19143b2019-04-15 11:32:22 +0200142 select TEGRA_PMC
Thierry Redingf9ec2ec2019-04-15 11:32:25 +0200143 select TEGRA_PMC_SECURE
Svyatoslav Ryhel412a4c62023-02-01 10:53:03 +0200144 select TEGRA_TIMER
Tom Warren7aaa5a62015-03-04 16:36:00 -0700145
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600146config TEGRA186
147 bool "Tegra186 family"
Stephen Warren0f67e232016-06-17 09:43:57 -0600148 select DM_MAILBOX
Tom Rini5afdcca2021-08-19 14:19:39 -0400149 select GICV2
Stephen Warren73dd5c42016-08-08 09:41:34 -0600150 select TEGRA186_BPMP
Stephen Warrend9fd7002016-08-08 11:28:24 -0600151 select TEGRA186_CLOCK
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600152 select TEGRA186_GPIO
Stephen Warren4dd99d12016-08-08 11:28:25 -0600153 select TEGRA186_RESET
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600154 select TEGRA_ARMV8_COMMON
Stephen Warren0f67e232016-06-17 09:43:57 -0600155 select TEGRA_HSP
Stephen Warren49626ea2016-07-18 12:17:11 -0600156 select TEGRA_IVC
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600157
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900158endchoice
159
Stephen Warrendd8204d2016-01-26 10:59:42 -0700160config TEGRA_DISCONNECT_UDC_ON_BOOT
161 bool "Disconnect USB device mode controller on boot"
Thierry Reding836a56e2019-04-15 11:32:26 +0200162 depends on CI_UDC
Stephen Warrendd8204d2016-01-26 10:59:42 -0700163 default y
164 help
165 When loading U-Boot into RAM over USB protocols using tools such as
166 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
167 mode controller is initialized and enumerated by the host PC running
168 the tool. Unfortunately, these tools do not shut down the USB
169 controller before executing the downloaded code, and so the host PC
170 does not "de-enumerate" the USB device. This option shuts down the
171 USB controller when U-Boot boots to avoid leaving a stale USB device
172 present.
173
Tom Rinibd3ef272022-03-30 18:07:13 -0400174config CI_UDC_HAS_HOSTPC
175 def_bool y
176 depends on CI_UDC && !TEGRA20
177
Simon Glassb724bd72015-02-11 16:32:59 -0700178config SYS_MALLOC_F_LEN
179 default 0x1800
180
Masahiro Yamada09f455d2015-02-20 17:04:04 +0900181source "arch/arm/mach-tegra/tegra20/Kconfig"
182source "arch/arm/mach-tegra/tegra30/Kconfig"
183source "arch/arm/mach-tegra/tegra114/Kconfig"
184source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warren7aaa5a62015-03-04 16:36:00 -0700185source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warrenc7ba99c2016-05-12 13:32:55 -0600186source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900187
Tom Rinid14f3f22022-12-02 16:42:45 -0500188config TEGRA_SPI
189 def_bool y
190 depends on TEGRA20_SFLASH || TEGRA20_SLINK || TEGRA114_SPI
191
192choice
193 prompt "UART to use for console"
194 depends on TEGRA_PINCTRL
195 default TEGRA_ENABLE_UARTA
196
197config TEGRA_ENABLE_UARTA
198 bool "Use UARTA"
199
200config TEGRA_ENABLE_UARTB
201 bool "Use UARTB"
202
203config TEGRA_ENABLE_UARTC
204 bool "Use UARTC"
205
206config TEGRA_ENABLE_UARTD
207 bool "Use UARTD"
208
209endchoice
210
Tom Rini7ef53a32022-06-08 08:24:33 -0400211config TEGRA_GPU
212 bool "Enable setting up the GPU"
213 depends on TEGRA124 || TEGRA210
214
Simon Glass42e6f852017-05-17 03:25:11 -0600215config CMD_ENTERRCM
216 bool "Enable 'enterrcm' command"
217 default y
218 help
219 Tegra's boot ROM supports a mode whereby code may be downloaded and
220 flash-programmed over a USB connection. On dev boards, this is
221 typically entered by holding down a "force recovery" button and
222 resetting the CPU. However, not all boards have such a button (one
223 example is the Compulab Trimslice), so a method to enter RCM from
224 software is useful.
225
226 Even on boards other than Trimslice, controlling this over a UART
227 may be useful, e.g. to allow simple remote control without the need
228 for mechanical button actuators, or hooking up relays/... to the
229 button.
230
Ramin Khonsari327ff8e2023-02-14 19:35:37 +0200231config CMD_EBTUPDATE
232 bool "Enable 'ebtupdate' command"
Svyatoslav Ryhel5a8fe1e2023-02-14 19:35:38 +0200233 depends on TEGRA20 || TEGRA30
Ramin Khonsari327ff8e2023-02-14 19:35:37 +0200234 select TEGRA_CRYPTO
235 help
236 Updating u-boot from within u-boot in rather complex or even
237 impossible on production devices. To make it easier procedure of
238 re-cryption was created. If your device was re-crypted choose Y.
239
Masahiro Yamadaddd960e2014-08-31 07:10:56 +0900240endif