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wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
Stefan Roesefa36ae72009-10-27 15:15:55 +010042#include <mtd/cfi_flash.h>
wdenk028ab6b2004-02-23 23:54:43 +000043
wdenk5653fc32004-02-08 22:55:38 +000044/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010045 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000051 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010057 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000060 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010062 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000063 */
64
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010065static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Mike Frysinger4ffeab22010-12-22 09:41:13 -050066#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +010067static uint flash_verbose = 1;
Mike Frysinger4ffeab22010-12-22 09:41:13 -050068#else
69#define flash_verbose 1
70#endif
Wolfgang Denk92eb7292006-12-27 01:26:13 +010071
Wolfgang Denk2a112b22008-08-08 16:39:54 +020072flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
73
Stefan Roese79b4cda2006-02-28 15:29:58 +010074/*
75 * Check if chip width is defined. If not, start detecting with 8bit.
76 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
78#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +010079#endif
80
Stefan Roese6f726f92010-10-25 18:31:48 +020081/*
82 * 0xffff is an undefined value for the configuration register. When
83 * this value is returned, the configuration register shall not be
84 * written at all (default mode).
85 */
86static u16 cfi_flash_config_reg(int i)
87{
88#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
89 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
90#else
91 return 0xffff;
92#endif
93}
94
Stefan Roeseca5def32010-08-31 10:00:10 +020095#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
96int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
97#endif
98
Stefan Roeseb00e19c2010-08-30 10:11:51 +020099static phys_addr_t __cfi_flash_bank_addr(int i)
100{
101 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
102}
103phys_addr_t cfi_flash_bank_addr(int i)
104 __attribute__((weak, alias("__cfi_flash_bank_addr")));
105
Ilya Yanokec50a8e2010-10-21 17:20:12 +0200106static unsigned long __cfi_flash_bank_size(int i)
107{
108#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
109 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
110#else
111 return 0;
112#endif
113}
114unsigned long cfi_flash_bank_size(int i)
115 __attribute__((weak, alias("__cfi_flash_bank_size")));
116
Stefan Roese45aa5a72008-11-17 14:45:22 +0100117static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100118{
119 __raw_writeb(value, addr);
120}
121
Stefan Roese45aa5a72008-11-17 14:45:22 +0100122static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100123{
124 __raw_writew(value, addr);
125}
126
Stefan Roese45aa5a72008-11-17 14:45:22 +0100127static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100128{
129 __raw_writel(value, addr);
130}
131
Stefan Roese45aa5a72008-11-17 14:45:22 +0100132static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100133{
134 /* No architectures currently implement __raw_writeq() */
135 *(volatile u64 *)addr = value;
136}
137
Stefan Roese45aa5a72008-11-17 14:45:22 +0100138static u8 __flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100139{
140 return __raw_readb(addr);
141}
142
Stefan Roese45aa5a72008-11-17 14:45:22 +0100143static u16 __flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100144{
145 return __raw_readw(addr);
146}
147
Stefan Roese45aa5a72008-11-17 14:45:22 +0100148static u32 __flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100149{
150 return __raw_readl(addr);
151}
152
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100153static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100154{
155 /* No architectures currently implement __raw_readq() */
156 return *(volatile u64 *)addr;
157}
158
Stefan Roese45aa5a72008-11-17 14:45:22 +0100159#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
160void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
161void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
162void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
163void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
164u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
165u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
166u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100167u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese45aa5a72008-11-17 14:45:22 +0100168#else
169#define flash_write8 __flash_write8
170#define flash_write16 __flash_write16
171#define flash_write32 __flash_write32
172#define flash_write64 __flash_write64
173#define flash_read8 __flash_read8
174#define flash_read16 __flash_read16
175#define flash_read32 __flash_read32
176#define flash_read64 __flash_read64
177#endif
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100178
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200179/*-----------------------------------------------------------------------
180 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Heiko Schocher4f975672009-02-10 09:53:29 +0100182flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200183{
184 int i;
Stefan Roesecba34aa2010-08-30 11:14:38 +0200185 flash_info_t *info = NULL;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200188 info = & flash_info[i];
189 if (info->size && info->start[0] <= base &&
190 base <= info->start[0] + info->size - 1)
191 break;
192 }
193
Stefan Roesecba34aa2010-08-30 11:14:38 +0200194 return info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200195}
wdenk5653fc32004-02-08 22:55:38 +0000196#endif
197
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100198unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
199{
200 if (sect != (info->sector_count - 1))
201 return info->start[sect + 1] - info->start[sect];
202 else
203 return info->start[0] + info->size - info->start[sect];
204}
205
wdenk5653fc32004-02-08 22:55:38 +0000206/*-----------------------------------------------------------------------
207 * create an address based on the offset and the port width
208 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100209static inline void *
210flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000211{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100212 unsigned int byte_offset = offset * info->portwidth;
213
Becky Bruce09ce9922009-02-02 16:34:51 -0600214 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100215}
216
217static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
218 unsigned int offset, void *addr)
219{
wdenk5653fc32004-02-08 22:55:38 +0000220}
wdenkbf9e3b32004-02-12 00:47:09 +0000221
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200222/*-----------------------------------------------------------------------
223 * make a proper sized command based on the port and chip widths
224 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200225static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200226{
227 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400228 int cword_offset;
229 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200231 u32 cmd_le = cpu_to_le32(cmd);
232#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400233 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200234 uchar *cp = (uchar *) cmdbuf;
235
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400236 for (i = info->portwidth; i > 0; i--){
237 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400239 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200240 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200241#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400242 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200243 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200244#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200245 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400246 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200247}
248
wdenkbf9e3b32004-02-12 00:47:09 +0000249#ifdef DEBUG
250/*-----------------------------------------------------------------------
251 * Debug support
252 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100253static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000254{
255 int i;
256 char *cp;
257
Wolfgang Denk657f2062009-02-04 09:42:20 +0100258 cp = (char *) &data;
wdenkbf9e3b32004-02-12 00:47:09 +0000259 for (i = 0; i < 8; i++)
260 sprintf (&str[i * 2], "%2.2x", *cp++);
261}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200262
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100263static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000264{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100265 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000266 int x, y;
267
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100268 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
269 debug("%02x : ", x);
270 for (y = 0; y < 16; y++)
271 debug("%2.2x ", p[x + y]);
272 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000273 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100274 unsigned char c = p[x + y];
275 if (c >= 0x20 && c <= 0x7e)
276 debug("%c", c);
277 else
278 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000279 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100280 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000281 }
282}
wdenkbf9e3b32004-02-12 00:47:09 +0000283#endif
284
285
wdenk5653fc32004-02-08 22:55:38 +0000286/*-----------------------------------------------------------------------
287 * read a character at a port width address
288 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100289static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000290{
291 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100292 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000293
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100294 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200295#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100296 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000297#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100298 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000299#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100300 flash_unmap (info, 0, offset, cp);
301 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000302}
303
304/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100305 * read a word at a port width address, assume 16bit bus
306 */
307static inline ushort flash_read_word (flash_info_t * info, uint offset)
308{
309 ushort *addr, retval;
310
311 addr = flash_map (info, 0, offset);
312 retval = flash_read16 (addr);
313 flash_unmap (info, 0, offset, addr);
314 return retval;
315}
316
317
318/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100319 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000320 * port size word. Swap for ppc format.
321 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100322static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
323 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000324{
wdenkbf9e3b32004-02-12 00:47:09 +0000325 uchar *addr;
326 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000327
wdenkbf9e3b32004-02-12 00:47:09 +0000328#ifdef DEBUG
329 int x;
330#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100331 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000332
333#ifdef DEBUG
334 debug ("long addr is at %p info->portwidth = %d\n", addr,
335 info->portwidth);
336 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100337 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000338 }
339#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200340#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100341 retval = ((flash_read8(addr) << 16) |
342 (flash_read8(addr + info->portwidth) << 24) |
343 (flash_read8(addr + 2 * info->portwidth)) |
344 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000345#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100346 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
347 (flash_read8(addr + info->portwidth - 1) << 16) |
348 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
349 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000350#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100351 flash_unmap(info, sect, offset, addr);
352
wdenkbf9e3b32004-02-12 00:47:09 +0000353 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000354}
355
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200356/*
357 * Write a proper sized command to the correct address
358 */
Stefan Roesefa36ae72009-10-27 15:15:55 +0100359void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
360 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200361{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100362
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100363 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200364 cfiword_t cword;
365
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100366 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200367 flash_make_cmd (info, cmd, &cword);
368 switch (info->portwidth) {
369 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100370 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200371 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100372 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200373 break;
374 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100375 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200376 cmd, cword.w,
377 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100378 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200379 break;
380 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100381 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200382 cmd, cword.l,
383 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100384 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200385 break;
386 case FLASH_CFI_64BIT:
387#ifdef DEBUG
388 {
389 char str[20];
390
391 print_longlong (str, cword.ll);
392
393 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100394 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200395 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
396 }
397#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100398 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200399 break;
400 }
401
402 /* Ensure all the instructions are fully finished */
403 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100404
405 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200406}
407
408static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
409{
410 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
411 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
412}
413
414/*-----------------------------------------------------------------------
415 */
416static int flash_isequal (flash_info_t * info, flash_sect_t sect,
417 uint offset, uchar cmd)
418{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100419 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200420 cfiword_t cword;
421 int retval;
422
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100423 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200424 flash_make_cmd (info, cmd, &cword);
425
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100426 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200427 switch (info->portwidth) {
428 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100429 debug ("is= %x %x\n", flash_read8(addr), cword.c);
430 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200431 break;
432 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100433 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
434 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200435 break;
436 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700437 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100438 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200439 break;
440 case FLASH_CFI_64BIT:
441#ifdef DEBUG
442 {
443 char str1[20];
444 char str2[20];
445
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100446 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200447 print_longlong (str2, cword.ll);
448 debug ("is= %s %s\n", str1, str2);
449 }
450#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100451 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200452 break;
453 default:
454 retval = 0;
455 break;
456 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100457 flash_unmap(info, sect, offset, addr);
458
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200459 return retval;
460}
461
462/*-----------------------------------------------------------------------
463 */
464static int flash_isset (flash_info_t * info, flash_sect_t sect,
465 uint offset, uchar cmd)
466{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100467 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200468 cfiword_t cword;
469 int retval;
470
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100471 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200472 flash_make_cmd (info, cmd, &cword);
473 switch (info->portwidth) {
474 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100475 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 break;
477 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100478 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100481 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200482 break;
483 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100484 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200485 break;
486 default:
487 retval = 0;
488 break;
489 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100490 flash_unmap(info, sect, offset, addr);
491
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200492 return retval;
493}
494
495/*-----------------------------------------------------------------------
496 */
497static int flash_toggle (flash_info_t * info, flash_sect_t sect,
498 uint offset, uchar cmd)
499{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100500 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200501 cfiword_t cword;
502 int retval;
503
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100504 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200505 flash_make_cmd (info, cmd, &cword);
506 switch (info->portwidth) {
507 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200508 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200509 break;
510 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200511 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200512 break;
513 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200514 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200515 break;
516 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100517 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
518 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200519 break;
520 default:
521 retval = 0;
522 break;
523 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100524 flash_unmap(info, sect, offset, addr);
525
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200526 return retval;
527}
528
529/*
530 * flash_is_busy - check to see if the flash is busy
531 *
532 * This routine checks the status of the chip and returns true if the
533 * chip is busy.
534 */
535static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
536{
537 int retval;
538
539 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400540 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200541 case CFI_CMDSET_INTEL_STANDARD:
542 case CFI_CMDSET_INTEL_EXTENDED:
543 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
544 break;
545 case CFI_CMDSET_AMD_STANDARD:
546 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100547#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200548 case CFI_CMDSET_AMD_LEGACY:
549#endif
550 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
551 break;
552 default:
553 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100554 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200555 debug ("flash_is_busy: %d\n", retval);
556 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100557}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200558
559/*-----------------------------------------------------------------------
560 * wait for XSR.7 to be set. Time out with an error if it does not.
561 * This routine does not set the flash to read-array mode.
562 */
563static int flash_status_check (flash_info_t * info, flash_sect_t sector,
564 ulong tout, char *prompt)
565{
566 ulong start;
567
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200568#if CONFIG_SYS_HZ != 1000
Renato Andreolac40c94a2010-03-24 23:00:47 +0800569 if ((ulong)CONFIG_SYS_HZ > 100000)
570 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
571 else
572 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200573#endif
574
575 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800576 reset_timer();
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200577 start = get_timer (0);
578 while (flash_is_busy (info, sector)) {
579 if (get_timer (start) > tout) {
580 printf ("Flash %s timeout at address %lx data %lx\n",
581 prompt, info->start[sector],
582 flash_read_long (info, sector, 0));
583 flash_write_cmd (info, sector, 0, info->cmd_reset);
584 return ERR_TIMOUT;
585 }
586 udelay (1); /* also triggers watchdog */
587 }
588 return ERR_OK;
589}
590
591/*-----------------------------------------------------------------------
592 * Wait for XSR.7 to be set, if it times out print an error, otherwise
593 * do a full status check.
594 *
595 * This routine sets the flash to read-array mode.
596 */
597static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
598 ulong tout, char *prompt)
599{
600 int retcode;
601
602 retcode = flash_status_check (info, sector, tout, prompt);
603 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400604 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200605 case CFI_CMDSET_INTEL_EXTENDED:
606 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500607 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200608 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
609 retcode = ERR_INVAL;
610 printf ("Flash %s error at address %lx\n", prompt,
611 info->start[sector]);
612 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
613 FLASH_STATUS_PSLBS)) {
614 puts ("Command Sequence Error.\n");
615 } else if (flash_isset (info, sector, 0,
616 FLASH_STATUS_ECLBS)) {
617 puts ("Block Erase Error.\n");
618 retcode = ERR_NOT_ERASED;
619 } else if (flash_isset (info, sector, 0,
620 FLASH_STATUS_PSLBS)) {
621 puts ("Locking Error\n");
622 }
623 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
624 puts ("Block locked.\n");
625 retcode = ERR_PROTECTED;
626 }
627 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
628 puts ("Vpp Low Error.\n");
629 }
630 flash_write_cmd (info, sector, 0, info->cmd_reset);
631 break;
632 default:
633 break;
634 }
635 return retcode;
636}
637
Thomas Choue5720822010-03-26 08:17:00 +0800638static int use_flash_status_poll(flash_info_t *info)
639{
640#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
641 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
642 info->vendor == CFI_CMDSET_AMD_STANDARD)
643 return 1;
644#endif
645 return 0;
646}
647
648static int flash_status_poll(flash_info_t *info, void *src, void *dst,
649 ulong tout, char *prompt)
650{
651#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
652 ulong start;
653 int ready;
654
655#if CONFIG_SYS_HZ != 1000
656 if ((ulong)CONFIG_SYS_HZ > 100000)
657 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
658 else
659 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
660#endif
661
662 /* Wait for command completion */
Thomas Chou22d6c8f2010-04-01 11:15:05 +0800663 reset_timer();
Thomas Choue5720822010-03-26 08:17:00 +0800664 start = get_timer(0);
665 while (1) {
666 switch (info->portwidth) {
667 case FLASH_CFI_8BIT:
668 ready = flash_read8(dst) == flash_read8(src);
669 break;
670 case FLASH_CFI_16BIT:
671 ready = flash_read16(dst) == flash_read16(src);
672 break;
673 case FLASH_CFI_32BIT:
674 ready = flash_read32(dst) == flash_read32(src);
675 break;
676 case FLASH_CFI_64BIT:
677 ready = flash_read64(dst) == flash_read64(src);
678 break;
679 default:
680 ready = 0;
681 break;
682 }
683 if (ready)
684 break;
685 if (get_timer(start) > tout) {
686 printf("Flash %s timeout at address %lx data %lx\n",
687 prompt, (ulong)dst, (ulong)flash_read8(dst));
688 return ERR_TIMOUT;
689 }
690 udelay(1); /* also triggers watchdog */
691 }
692#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
693 return ERR_OK;
694}
695
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200696/*-----------------------------------------------------------------------
697 */
698static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
699{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200700#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200701 unsigned short w;
702 unsigned int l;
703 unsigned long long ll;
704#endif
705
706 switch (info->portwidth) {
707 case FLASH_CFI_8BIT:
708 cword->c = c;
709 break;
710 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200711#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200712 w = c;
713 w <<= 8;
714 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100715#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200716 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100717#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200718 break;
719 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200720#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200721 l = c;
722 l <<= 24;
723 cword->l = (cword->l >> 8) | l;
724#else
725 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200726#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200727 break;
728 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200729#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200730 ll = c;
731 ll <<= 56;
732 cword->ll = (cword->ll >> 8) | ll;
733#else
734 cword->ll = (cword->ll << 8) | c;
735#endif
736 break;
wdenk5653fc32004-02-08 22:55:38 +0000737 }
wdenk5653fc32004-02-08 22:55:38 +0000738}
739
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100740/*
741 * Loop through the sector table starting from the previously found sector.
742 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000743 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200744static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000745{
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100746 static flash_sect_t saved_sector = 0; /* previously found sector */
Martin Krauseaf567302011-03-21 18:07:56 +0100747 static flash_info_t *saved_info = 0; /* previously used flash bank */
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100748 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000749
Martin Krauseaf567302011-03-21 18:07:56 +0100750 if ((info != saved_info) || (sector >= info->sector_count))
751 sector = 0;
752
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100753 while ((info->start[sector] < addr)
754 && (sector < info->sector_count - 1))
755 sector++;
756 while ((info->start[sector] > addr) && (sector > 0))
757 /*
758 * also decrements the sector in case of an overshot
759 * in the first loop
760 */
761 sector--;
762
763 saved_sector = sector;
Martin Krauseaf567302011-03-21 18:07:56 +0100764 saved_info = info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200765 return sector;
wdenk7680c142005-05-16 15:23:22 +0000766}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200767
768/*-----------------------------------------------------------------------
769 */
770static int flash_write_cfiword (flash_info_t * info, ulong dest,
771 cfiword_t cword)
772{
Becky Bruce09ce9922009-02-02 16:34:51 -0600773 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200774 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100775 flash_sect_t sect = 0;
776 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200777
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200778 /* Check if Flash is (sufficiently) erased */
779 switch (info->portwidth) {
780 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100781 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200782 break;
783 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100784 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200785 break;
786 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100787 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200788 break;
789 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100790 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200791 break;
792 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100793 flag = 0;
794 break;
795 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600796 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100797 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200798
799 /* Disable interrupts which might cause a timeout here */
800 flag = disable_interrupts ();
801
802 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400803 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200804 case CFI_CMDSET_INTEL_EXTENDED:
805 case CFI_CMDSET_INTEL_STANDARD:
806 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
807 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
808 break;
809 case CFI_CMDSET_AMD_EXTENDED:
810 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500811 sect = find_sector(info, dest);
812 flash_unlock_seq (info, sect);
813 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100814 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200815 break;
Po-Yu Chuangb4db4a72009-07-10 18:03:57 +0800816#ifdef CONFIG_FLASH_CFI_LEGACY
817 case CFI_CMDSET_AMD_LEGACY:
818 sect = find_sector(info, dest);
819 flash_unlock_seq (info, 0);
820 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
821 sect_found = 1;
822 break;
823#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200824 }
825
826 switch (info->portwidth) {
827 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100828 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200829 break;
830 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100831 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200832 break;
833 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100834 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200835 break;
836 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100837 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200838 break;
839 }
840
841 /* re-enable interrupts if necessary */
842 if (flag)
843 enable_interrupts ();
844
Jens Gehrleina7292872008-12-16 17:25:54 +0100845 if (!sect_found)
846 sect = find_sector (info, dest);
847
Thomas Choue5720822010-03-26 08:17:00 +0800848 if (use_flash_status_poll(info))
849 return flash_status_poll(info, &cword, dstaddr,
850 info->write_tout, "write");
851 else
852 return flash_full_status_check(info, sect,
853 info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200854}
855
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200856#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200857
858static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
859 int len)
860{
861 flash_sect_t sector;
862 int cnt;
863 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100864 void *src = cp;
Stefan Roeseec21d5c2009-02-05 11:25:57 +0100865 void *dst = (void *)dest;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100866 void *dst2 = dst;
867 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200868 uint offset = 0;
869 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400870 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100871
Stefan Roese0dc80e22007-12-27 07:50:54 +0100872 switch (info->portwidth) {
873 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200874 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100875 break;
876 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200877 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100878 break;
879 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200880 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100881 break;
882 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200883 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100884 break;
885 default:
886 retcode = ERR_INVAL;
887 goto out_unmap;
888 }
889
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200890 cnt = len >> shift;
891
Stefan Roese0dc80e22007-12-27 07:50:54 +0100892 while ((cnt-- > 0) && (flag == 0)) {
893 switch (info->portwidth) {
894 case FLASH_CFI_8BIT:
895 flag = ((flash_read8(dst2) & flash_read8(src)) ==
896 flash_read8(src));
897 src += 1, dst2 += 1;
898 break;
899 case FLASH_CFI_16BIT:
900 flag = ((flash_read16(dst2) & flash_read16(src)) ==
901 flash_read16(src));
902 src += 2, dst2 += 2;
903 break;
904 case FLASH_CFI_32BIT:
905 flag = ((flash_read32(dst2) & flash_read32(src)) ==
906 flash_read32(src));
907 src += 4, dst2 += 4;
908 break;
909 case FLASH_CFI_64BIT:
910 flag = ((flash_read64(dst2) & flash_read64(src)) ==
911 flash_read64(src));
912 src += 8, dst2 += 8;
913 break;
914 }
915 }
916 if (!flag) {
917 retcode = ERR_NOT_ERASED;
918 goto out_unmap;
919 }
920
921 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100922 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200923
924 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400925 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200926 case CFI_CMDSET_INTEL_STANDARD:
927 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400928 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
929 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200930 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400931 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
932 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200933 retcode = flash_status_check (info, sector,
934 info->buffer_write_tout,
935 "write to buffer");
936 if (retcode == ERR_OK) {
937 /* reduce the number of loops by the width of
938 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200939 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400940 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200941 while (cnt-- > 0) {
942 switch (info->portwidth) {
943 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100944 flash_write8(flash_read8(src), dst);
945 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200946 break;
947 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100948 flash_write16(flash_read16(src), dst);
949 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200950 break;
951 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100952 flash_write32(flash_read32(src), dst);
953 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200954 break;
955 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100956 flash_write64(flash_read64(src), dst);
957 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200958 break;
959 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100960 retcode = ERR_INVAL;
961 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200962 }
963 }
964 flash_write_cmd (info, sector, 0,
965 FLASH_CMD_WRITE_BUFFER_CONFIRM);
966 retcode = flash_full_status_check (
967 info, sector, info->buffer_write_tout,
968 "buffer write");
969 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100970
971 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200972
973 case CFI_CMDSET_AMD_STANDARD:
974 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200975 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200976
977#ifdef CONFIG_FLASH_SPANSION_S29WS_N
978 offset = ((unsigned long)dst - info->start[sector]) >> shift;
979#endif
980 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
981 cnt = len >> shift;
John Schmoller7dedefd2009-08-12 10:55:47 -0500982 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200983
984 switch (info->portwidth) {
985 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100986 while (cnt-- > 0) {
987 flash_write8(flash_read8(src), dst);
988 src += 1, dst += 1;
989 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200990 break;
991 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100992 while (cnt-- > 0) {
993 flash_write16(flash_read16(src), dst);
994 src += 2, dst += 2;
995 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200996 break;
997 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100998 while (cnt-- > 0) {
999 flash_write32(flash_read32(src), dst);
1000 src += 4, dst += 4;
1001 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001002 break;
1003 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001004 while (cnt-- > 0) {
1005 flash_write64(flash_read64(src), dst);
1006 src += 8, dst += 8;
1007 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001008 break;
1009 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001010 retcode = ERR_INVAL;
1011 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001012 }
1013
1014 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Choue5720822010-03-26 08:17:00 +08001015 if (use_flash_status_poll(info))
1016 retcode = flash_status_poll(info, src - (1 << shift),
1017 dst - (1 << shift),
1018 info->buffer_write_tout,
1019 "buffer write");
1020 else
1021 retcode = flash_full_status_check(info, sector,
1022 info->buffer_write_tout,
1023 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001024 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001025
1026 default:
1027 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001028 retcode = ERR_INVAL;
1029 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001030 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001031
1032out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001033 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001034}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001035#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001036
wdenk7680c142005-05-16 15:23:22 +00001037
1038/*-----------------------------------------------------------------------
1039 */
wdenkbf9e3b32004-02-12 00:47:09 +00001040int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001041{
1042 int rcode = 0;
1043 int prot;
1044 flash_sect_t sect;
Thomas Choue5720822010-03-26 08:17:00 +08001045 int st;
wdenk5653fc32004-02-08 22:55:38 +00001046
wdenkbf9e3b32004-02-12 00:47:09 +00001047 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001048 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001049 return 1;
1050 }
1051 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001052 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001053 return 1;
1054 }
1055
1056 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001057 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001058 if (info->protect[sect]) {
1059 prot++;
1060 }
1061 }
1062 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001063 printf ("- Warning: %d protected sectors will not be erased!\n",
1064 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001065 } else if (flash_verbose) {
wdenk4b9206e2004-03-23 22:14:11 +00001066 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001067 }
1068
1069
wdenkbf9e3b32004-02-12 00:47:09 +00001070 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001071 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001072 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001073 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001074 case CFI_CMDSET_INTEL_STANDARD:
1075 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001076 flash_write_cmd (info, sect, 0,
1077 FLASH_CMD_CLEAR_STATUS);
1078 flash_write_cmd (info, sect, 0,
1079 FLASH_CMD_BLOCK_ERASE);
1080 flash_write_cmd (info, sect, 0,
1081 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001082 break;
1083 case CFI_CMDSET_AMD_STANDARD:
1084 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001085 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001086 flash_write_cmd (info, sect,
1087 info->addr_unlock1,
1088 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001089 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001090 flash_write_cmd (info, sect, 0,
1091 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001092 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001093#ifdef CONFIG_FLASH_CFI_LEGACY
1094 case CFI_CMDSET_AMD_LEGACY:
1095 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001096 flash_write_cmd (info, 0, info->addr_unlock1,
1097 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001098 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001099 flash_write_cmd (info, sect, 0,
1100 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001101 break;
1102#endif
wdenk5653fc32004-02-08 22:55:38 +00001103 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001104 debug ("Unkown flash vendor %d\n",
1105 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001106 break;
1107 }
1108
Thomas Choue5720822010-03-26 08:17:00 +08001109 if (use_flash_status_poll(info)) {
1110 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
1111 void *dest;
1112 dest = flash_map(info, sect, 0);
1113 st = flash_status_poll(info, &cword, dest,
1114 info->erase_blk_tout, "erase");
1115 flash_unmap(info, sect, 0, dest);
1116 } else
1117 st = flash_full_status_check(info, sect,
1118 info->erase_blk_tout,
1119 "erase");
1120 if (st)
wdenk5653fc32004-02-08 22:55:38 +00001121 rcode = 1;
Thomas Choue5720822010-03-26 08:17:00 +08001122 else if (flash_verbose)
wdenk4b9206e2004-03-23 22:14:11 +00001123 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001124 }
1125 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001126
1127 if (flash_verbose)
1128 puts (" done\n");
1129
wdenk5653fc32004-02-08 22:55:38 +00001130 return rcode;
1131}
1132
Stefan Roese70084df2010-08-13 09:36:36 +02001133#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1134static int sector_erased(flash_info_t *info, int i)
1135{
1136 int k;
1137 int size;
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001138 u32 *flash;
Stefan Roese70084df2010-08-13 09:36:36 +02001139
1140 /*
1141 * Check if whole sector is erased
1142 */
1143 size = flash_sector_size(info, i);
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001144 flash = (u32 *)info->start[i];
Stefan Roese70084df2010-08-13 09:36:36 +02001145 /* divide by 4 for longword access */
1146 size = size >> 2;
1147
1148 for (k = 0; k < size; k++) {
Stefan Roese4d2ca9d2010-10-25 18:31:39 +02001149 if (flash_read32(flash++) != 0xffffffff)
Stefan Roese70084df2010-08-13 09:36:36 +02001150 return 0; /* not erased */
1151 }
1152
1153 return 1; /* erased */
1154}
1155#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1156
wdenkbf9e3b32004-02-12 00:47:09 +00001157void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001158{
1159 int i;
1160
1161 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001162 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001163 return;
1164 }
1165
Peter Tysereddf52b2010-12-28 18:12:05 -06001166 printf ("%s flash (%d x %d)",
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001167 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001168 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001169 if (info->size < 1024*1024)
1170 printf (" Size: %ld kB in %d Sectors\n",
1171 info->size >> 10, info->sector_count);
1172 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001173 printf (" Size: %ld MB in %d Sectors\n",
1174 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001175 printf (" ");
1176 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001177 case CFI_CMDSET_INTEL_PROG_REGIONS:
1178 printf ("Intel Prog Regions");
1179 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001180 case CFI_CMDSET_INTEL_STANDARD:
1181 printf ("Intel Standard");
1182 break;
1183 case CFI_CMDSET_INTEL_EXTENDED:
1184 printf ("Intel Extended");
1185 break;
1186 case CFI_CMDSET_AMD_STANDARD:
1187 printf ("AMD Standard");
1188 break;
1189 case CFI_CMDSET_AMD_EXTENDED:
1190 printf ("AMD Extended");
1191 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001192#ifdef CONFIG_FLASH_CFI_LEGACY
1193 case CFI_CMDSET_AMD_LEGACY:
1194 printf ("AMD Legacy");
1195 break;
1196#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001197 default:
1198 printf ("Unknown (%d)", info->vendor);
1199 break;
1200 }
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001201 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1202 info->manufacturer_id);
1203 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1204 info->device_id);
Stefan Roese260421a2006-11-13 13:55:24 +01001205 if (info->device_id == 0x7E) {
1206 printf("%04X", info->device_id2);
1207 }
1208 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001209 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001210 info->write_tout);
1211 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001212 printf (" Buffer write timeout: %ld ms, "
1213 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001214 info->buffer_write_tout,
1215 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001216 }
wdenk5653fc32004-02-08 22:55:38 +00001217
Stefan Roese260421a2006-11-13 13:55:24 +01001218 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001219 for (i = 0; i < info->sector_count; ++i) {
Kim Phillips2e973942010-07-26 18:35:39 -05001220 if (ctrlc())
Stefan Roese70084df2010-08-13 09:36:36 +02001221 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001222 if ((i % 5) == 0)
Stefan Roese70084df2010-08-13 09:36:36 +02001223 putc('\n');
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001224#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001225 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001226 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001227 info->start[i],
Stefan Roese70084df2010-08-13 09:36:36 +02001228 sector_erased(info, i) ? 'E' : ' ',
Stefan Roese260421a2006-11-13 13:55:24 +01001229 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001230#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001231 printf (" %08lX %s ",
1232 info->start[i],
1233 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001234#endif
1235 }
wdenk4b9206e2004-03-23 22:14:11 +00001236 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001237 return;
1238}
1239
1240/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001241 * This is used in a few places in write_buf() to show programming
1242 * progress. Making it a function is nasty because it needs to do side
1243 * effect updates to digit and dots. Repeated code is nasty too, so
1244 * we define it once here.
1245 */
Stefan Roesef0105722008-03-19 07:09:26 +01001246#ifdef CONFIG_FLASH_SHOW_PROGRESS
1247#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001248 if (flash_verbose) { \
1249 dots -= dots_sub; \
1250 if ((scale > 0) && (dots <= 0)) { \
1251 if ((digit % 5) == 0) \
1252 printf ("%d", digit / 5); \
1253 else \
1254 putc ('.'); \
1255 digit--; \
1256 dots += scale; \
1257 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001258 }
Stefan Roesef0105722008-03-19 07:09:26 +01001259#else
1260#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1261#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001262
1263/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001264 * Copy memory to flash, returns:
1265 * 0 - OK
1266 * 1 - write timeout
1267 * 2 - Flash not erased
1268 */
wdenkbf9e3b32004-02-12 00:47:09 +00001269int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001270{
1271 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001272 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001273 int aln;
1274 cfiword_t cword;
1275 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001276#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001277 int buffered_size;
1278#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001279#ifdef CONFIG_FLASH_SHOW_PROGRESS
1280 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1281 int scale = 0;
1282 int dots = 0;
1283
1284 /*
1285 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1286 */
1287 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1288 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1289 CONFIG_FLASH_SHOW_PROGRESS);
1290 }
1291#endif
1292
wdenkbf9e3b32004-02-12 00:47:09 +00001293 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001294 wp = (addr & ~(info->portwidth - 1));
1295
1296 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001297 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001298 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001299 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001300 for (i = 0; i < aln; ++i)
1301 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001302
wdenkbf9e3b32004-02-12 00:47:09 +00001303 for (; (i < info->portwidth) && (cnt > 0); i++) {
1304 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001305 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001306 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001307 for (; (cnt == 0) && (i < info->portwidth); ++i)
1308 flash_add_byte (info, &cword, flash_read8(p + i));
1309
1310 rc = flash_write_cfiword (info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001311 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001312 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001313
1314 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001315 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001316 }
1317
wdenkbf9e3b32004-02-12 00:47:09 +00001318 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001319#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001320 buffered_size = (info->portwidth / info->chipwidth);
1321 buffered_size *= info->buffer_size;
1322 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001323 /* prohibit buffer write when buffer_size is 1 */
1324 if (info->buffer_size == 1) {
1325 cword.l = 0;
1326 for (i = 0; i < info->portwidth; i++)
1327 flash_add_byte (info, &cword, *src++);
1328 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1329 return rc;
1330 wp += info->portwidth;
1331 cnt -= info->portwidth;
1332 continue;
1333 }
1334
1335 /* write buffer until next buffered_size aligned boundary */
1336 i = buffered_size - (wp % buffered_size);
1337 if (i > cnt)
1338 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001339 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001340 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001341 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001342 wp += i;
1343 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001344 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001345 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001346 }
1347#else
wdenkbf9e3b32004-02-12 00:47:09 +00001348 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001349 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001350 for (i = 0; i < info->portwidth; i++) {
1351 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001352 }
wdenkbf9e3b32004-02-12 00:47:09 +00001353 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001354 return rc;
1355 wp += info->portwidth;
1356 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001357 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001358 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001359#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001360
wdenk5653fc32004-02-08 22:55:38 +00001361 if (cnt == 0) {
1362 return (0);
1363 }
1364
1365 /*
1366 * handle unaligned tail bytes
1367 */
1368 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001369 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001370 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001371 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001372 --cnt;
1373 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001374 for (; i < info->portwidth; ++i)
1375 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001376
wdenkbf9e3b32004-02-12 00:47:09 +00001377 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001378}
1379
1380/*-----------------------------------------------------------------------
1381 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001382#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001383
wdenkbf9e3b32004-02-12 00:47:09 +00001384int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001385{
1386 int retcode = 0;
1387
Rafael Camposbc9019e2008-07-31 10:22:20 +02001388 switch (info->vendor) {
1389 case CFI_CMDSET_INTEL_PROG_REGIONS:
1390 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001391 case CFI_CMDSET_INTEL_EXTENDED:
Philippe De Muyter54652992010-08-17 18:40:25 +02001392 /*
1393 * see errata called
1394 * "Numonyx Axcell P33/P30 Specification Update" :)
1395 */
1396 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
1397 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
1398 prot)) {
1399 /*
1400 * cmd must come before FLASH_CMD_PROTECT + 20us
1401 * Disable interrupts which might cause a timeout here.
1402 */
1403 int flag = disable_interrupts ();
1404 unsigned short cmd;
1405
1406 if (prot)
1407 cmd = FLASH_CMD_PROTECT_SET;
1408 else
1409 cmd = FLASH_CMD_PROTECT_CLEAR;
1410
Rafael Camposbc9019e2008-07-31 10:22:20 +02001411 flash_write_cmd (info, sector, 0,
Philippe De Muyter54652992010-08-17 18:40:25 +02001412 FLASH_CMD_PROTECT);
1413 flash_write_cmd (info, sector, 0, cmd);
1414 /* re-enable interrupts if necessary */
1415 if (flag)
1416 enable_interrupts ();
1417 }
Rafael Camposbc9019e2008-07-31 10:22:20 +02001418 break;
1419 case CFI_CMDSET_AMD_EXTENDED:
1420 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001421 /* U-Boot only checks the first byte */
1422 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1423 if (prot) {
1424 flash_unlock_seq (info, 0);
1425 flash_write_cmd (info, 0,
1426 info->addr_unlock1,
1427 ATM_CMD_SOFTLOCK_START);
1428 flash_unlock_seq (info, 0);
1429 flash_write_cmd (info, sector, 0,
1430 ATM_CMD_LOCK_SECT);
1431 } else {
1432 flash_write_cmd (info, 0,
1433 info->addr_unlock1,
1434 AMD_CMD_UNLOCK_START);
1435 if (info->device_id == ATM_ID_BV6416)
1436 flash_write_cmd (info, sector,
1437 0, ATM_CMD_UNLOCK_SECT);
1438 }
1439 }
1440 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001441#ifdef CONFIG_FLASH_CFI_LEGACY
1442 case CFI_CMDSET_AMD_LEGACY:
1443 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1444 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1445 if (prot)
1446 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1447 else
1448 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1449#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001450 };
wdenk5653fc32004-02-08 22:55:38 +00001451
Stefan Roesedf4e8132010-10-25 18:31:29 +02001452 /*
1453 * Flash needs to be in status register read mode for
1454 * flash_full_status_check() to work correctly
1455 */
1456 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
wdenkbf9e3b32004-02-12 00:47:09 +00001457 if ((retcode =
1458 flash_full_status_check (info, sector, info->erase_blk_tout,
1459 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001460
1461 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001462
1463 /*
1464 * On some of Intel's flash chips (marked via legacy_unlock)
1465 * unprotect unprotects all locking.
1466 */
1467 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001468 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001469
1470 for (i = 0; i < info->sector_count; i++) {
1471 if (info->protect[i])
1472 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001473 }
1474 }
1475 }
wdenk5653fc32004-02-08 22:55:38 +00001476 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001477}
1478
wdenk5653fc32004-02-08 22:55:38 +00001479/*-----------------------------------------------------------------------
1480 * flash_read_user_serial - read the OneTimeProgramming cells
1481 */
wdenkbf9e3b32004-02-12 00:47:09 +00001482void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1483 int len)
wdenk5653fc32004-02-08 22:55:38 +00001484{
wdenkbf9e3b32004-02-12 00:47:09 +00001485 uchar *src;
1486 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001487
1488 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001489 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001490 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1491 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001492 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001493 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001494}
wdenkbf9e3b32004-02-12 00:47:09 +00001495
wdenk5653fc32004-02-08 22:55:38 +00001496/*
1497 * flash_read_factory_serial - read the device Id from the protection area
1498 */
wdenkbf9e3b32004-02-12 00:47:09 +00001499void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1500 int len)
wdenk5653fc32004-02-08 22:55:38 +00001501{
wdenkbf9e3b32004-02-12 00:47:09 +00001502 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001503
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001504 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001505 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1506 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001507 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001508 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001509}
1510
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001511#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001512
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001513/*-----------------------------------------------------------------------
1514 * Reverse the order of the erase regions in the CFI QRY structure.
1515 * This is needed for chips that are either a) correctly detected as
1516 * top-boot, or b) buggy.
1517 */
1518static void cfi_reverse_geometry(struct cfi_qry *qry)
1519{
1520 unsigned int i, j;
1521 u32 tmp;
1522
1523 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1524 tmp = qry->erase_region_info[i];
1525 qry->erase_region_info[i] = qry->erase_region_info[j];
1526 qry->erase_region_info[j] = tmp;
1527 }
1528}
wdenk5653fc32004-02-08 22:55:38 +00001529
1530/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001531 * read jedec ids from device and set corresponding fields in info struct
1532 *
1533 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1534 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001535 */
1536static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1537{
1538 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1539 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1540 udelay(1000); /* some flash are slow to respond */
1541 info->manufacturer_id = flash_read_uchar (info,
1542 FLASH_OFFSET_MANUFACTURER_ID);
Philippe De Muyterd77c7ac2010-08-10 16:54:52 +02001543 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1544 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1545 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001546 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1547}
1548
1549static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1550{
1551 info->cmd_reset = FLASH_CMD_RESET;
1552
1553 cmdset_intel_read_jedec_ids(info);
1554 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1555
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001556#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001557 /* read legacy lock/unlock bit from intel flash */
1558 if (info->ext_addr) {
1559 info->legacy_unlock = flash_read_uchar (info,
1560 info->ext_addr + 5) & 0x08;
1561 }
1562#endif
1563
1564 return 0;
1565}
1566
1567static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1568{
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001569 ushort bankId = 0;
1570 uchar manuId;
1571
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001572 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1573 flash_unlock_seq(info, 0);
1574 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1575 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001576
Niklaus Giger3a7b2c22009-07-22 17:13:24 +02001577 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1578 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1579 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1580 bankId += 0x100;
1581 manuId = flash_read_uchar (info,
1582 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1583 }
1584 info->manufacturer_id = manuId;
Tor Krill90447ec2008-03-28 11:29:10 +01001585
1586 switch (info->chipwidth){
1587 case FLASH_CFI_8BIT:
1588 info->device_id = flash_read_uchar (info,
1589 FLASH_OFFSET_DEVICE_ID);
1590 if (info->device_id == 0x7E) {
1591 /* AMD 3-byte (expanded) device ids */
1592 info->device_id2 = flash_read_uchar (info,
1593 FLASH_OFFSET_DEVICE_ID2);
1594 info->device_id2 <<= 8;
1595 info->device_id2 |= flash_read_uchar (info,
1596 FLASH_OFFSET_DEVICE_ID3);
1597 }
1598 break;
1599 case FLASH_CFI_16BIT:
1600 info->device_id = flash_read_word (info,
1601 FLASH_OFFSET_DEVICE_ID);
1602 break;
1603 default:
1604 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001605 }
1606 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1607}
1608
1609static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1610{
1611 info->cmd_reset = AMD_CMD_RESET;
1612
1613 cmdset_amd_read_jedec_ids(info);
1614 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1615
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001616 return 0;
1617}
1618
1619#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001620static void flash_read_jedec_ids (flash_info_t * info)
1621{
1622 info->manufacturer_id = 0;
1623 info->device_id = 0;
1624 info->device_id2 = 0;
1625
1626 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001627 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001628 case CFI_CMDSET_INTEL_STANDARD:
1629 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001630 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001631 break;
1632 case CFI_CMDSET_AMD_STANDARD:
1633 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001634 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001635 break;
1636 default:
1637 break;
1638 }
1639}
1640
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001641/*-----------------------------------------------------------------------
1642 * Call board code to request info about non-CFI flash.
1643 * board_flash_get_legacy needs to fill in at least:
1644 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1645 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001646static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001647{
1648 flash_info_t *info = &flash_info[banknum];
1649
1650 if (board_flash_get_legacy(base, banknum, info)) {
1651 /* board code may have filled info completely. If not, we
1652 use JEDEC ID probing. */
1653 if (!info->vendor) {
1654 int modes[] = {
1655 CFI_CMDSET_AMD_STANDARD,
1656 CFI_CMDSET_INTEL_STANDARD
1657 };
1658 int i;
1659
1660 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1661 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001662 info->start[0] =
1663 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001664 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001665 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001666 if (info->portwidth == FLASH_CFI_8BIT
1667 && info->interface == FLASH_CFI_X8X16) {
1668 info->addr_unlock1 = 0x2AAA;
1669 info->addr_unlock2 = 0x5555;
1670 } else {
1671 info->addr_unlock1 = 0x5555;
1672 info->addr_unlock2 = 0x2AAA;
1673 }
1674 flash_read_jedec_ids(info);
1675 debug("JEDEC PROBE: ID %x %x %x\n",
1676 info->manufacturer_id,
1677 info->device_id,
1678 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001679 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001680 break;
Becky Bruce09ce9922009-02-02 16:34:51 -06001681 else
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001682 unmap_physmem((void *)info->start[0],
Becky Bruce09ce9922009-02-02 16:34:51 -06001683 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001684 }
1685 }
1686
1687 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001688 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001689 case CFI_CMDSET_INTEL_STANDARD:
1690 case CFI_CMDSET_INTEL_EXTENDED:
1691 info->cmd_reset = FLASH_CMD_RESET;
1692 break;
1693 case CFI_CMDSET_AMD_STANDARD:
1694 case CFI_CMDSET_AMD_EXTENDED:
1695 case CFI_CMDSET_AMD_LEGACY:
1696 info->cmd_reset = AMD_CMD_RESET;
1697 break;
1698 }
1699 info->flash_id = FLASH_MAN_CFI;
1700 return 1;
1701 }
1702 return 0; /* use CFI */
1703}
1704#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001705static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001706{
1707 return 0; /* use CFI */
1708}
1709#endif
1710
Stefan Roese260421a2006-11-13 13:55:24 +01001711/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001712 * detect if flash is compatible with the Common Flash Interface (CFI)
1713 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001714 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001715static void flash_read_cfi (flash_info_t *info, void *buf,
1716 unsigned int start, size_t len)
1717{
1718 u8 *p = buf;
1719 unsigned int i;
1720
1721 for (i = 0; i < len; i++)
1722 p[i] = flash_read_uchar(info, start + i);
1723}
1724
Stefan Roesefa36ae72009-10-27 15:15:55 +01001725void __flash_cmd_reset(flash_info_t *info)
1726{
1727 /*
1728 * We do not yet know what kind of commandset to use, so we issue
1729 * the reset command in both Intel and AMD variants, in the hope
1730 * that AMD flash roms ignore the Intel command.
1731 */
1732 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1733 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1734}
1735void flash_cmd_reset(flash_info_t *info)
1736 __attribute__((weak,alias("__flash_cmd_reset")));
1737
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001738static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001739{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001740 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001741
Stefan Roesefa36ae72009-10-27 15:15:55 +01001742 /* Issue FLASH reset command */
1743 flash_cmd_reset(info);
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001744
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001745 for (cfi_offset=0;
1746 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1747 cfi_offset++) {
1748 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1749 FLASH_CMD_CFI);
1750 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1751 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1752 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001753 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1754 sizeof(struct cfi_qry));
1755 info->interface = le16_to_cpu(qry->interface_desc);
1756
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001757 info->cfi_offset = flash_offset_cfi[cfi_offset];
1758 debug ("device interface is %d\n",
1759 info->interface);
1760 debug ("found port %d chip %d ",
1761 info->portwidth, info->chipwidth);
1762 debug ("port %d bits chip %d bits\n",
1763 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1764 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1765
1766 /* calculate command offsets as in the Linux driver */
1767 info->addr_unlock1 = 0x555;
1768 info->addr_unlock2 = 0x2aa;
1769
1770 /*
1771 * modify the unlock address if we are
1772 * in compatibility mode
1773 */
1774 if ( /* x8/x16 in x8 mode */
1775 ((info->chipwidth == FLASH_CFI_BY8) &&
1776 (info->interface == FLASH_CFI_X8X16)) ||
1777 /* x16/x32 in x16 mode */
1778 ((info->chipwidth == FLASH_CFI_BY16) &&
1779 (info->interface == FLASH_CFI_X16X32)))
1780 {
1781 info->addr_unlock1 = 0xaaa;
1782 info->addr_unlock2 = 0x555;
1783 }
1784
1785 info->name = "CFI conformant";
1786 return 1;
1787 }
1788 }
1789
1790 return 0;
1791}
1792
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001793static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001794{
wdenkbf9e3b32004-02-12 00:47:09 +00001795 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001796
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001797 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001798 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1799 for (info->chipwidth = FLASH_CFI_BY8;
1800 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001801 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001802 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001803 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001804 }
wdenkbf9e3b32004-02-12 00:47:09 +00001805 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001806 return 0;
1807}
wdenkbf9e3b32004-02-12 00:47:09 +00001808
wdenk5653fc32004-02-08 22:55:38 +00001809/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001810 * Manufacturer-specific quirks. Add workarounds for geometry
1811 * reversal, etc. here.
1812 */
1813static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1814{
1815 /* check if flash geometry needs reversal */
1816 if (qry->num_erase_regions > 1) {
1817 /* reverse geometry if top boot part */
1818 if (info->cfi_version < 0x3131) {
1819 /* CFI < 1.1, try to guess from device id */
1820 if ((info->device_id & 0x80) != 0)
1821 cfi_reverse_geometry(qry);
1822 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1823 /* CFI >= 1.1, deduct from top/bottom flag */
1824 /* note: ext_addr is valid since cfi_version > 0 */
1825 cfi_reverse_geometry(qry);
1826 }
1827 }
1828}
1829
1830static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1831{
1832 int reverse_geometry = 0;
1833
1834 /* Check the "top boot" bit in the PRI */
1835 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1836 reverse_geometry = 1;
1837
1838 /* AT49BV6416(T) list the erase regions in the wrong order.
1839 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01001840 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001841 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001842 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1843 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001844
1845 if (reverse_geometry)
1846 cfi_reverse_geometry(qry);
1847}
1848
Richard Retanubune8eac432009-01-14 08:44:26 -05001849static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1850{
1851 /* check if flash geometry needs reversal */
1852 if (qry->num_erase_regions > 1) {
1853 /* reverse geometry if top boot part */
1854 if (info->cfi_version < 0x3131) {
Richard Retanubun7a886012009-03-06 10:09:37 -05001855 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1856 if (info->device_id == 0x22CA ||
1857 info->device_id == 0x2256) {
Richard Retanubune8eac432009-01-14 08:44:26 -05001858 cfi_reverse_geometry(qry);
1859 }
1860 }
1861 }
1862}
1863
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001864/*
wdenk5653fc32004-02-08 22:55:38 +00001865 * The following code cannot be run from FLASH!
1866 *
1867 */
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001868ulong flash_get_size (phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001869{
wdenkbf9e3b32004-02-12 00:47:09 +00001870 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001871 int i, j;
1872 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06001873 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00001874 unsigned long tmp;
1875 int size_ratio;
1876 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001877 int erase_region_size;
1878 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001879 struct cfi_qry qry;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001880 unsigned long max_size;
Stefan Roese260421a2006-11-13 13:55:24 +01001881
Kumar Galaf9796902008-05-15 15:13:08 -05001882 memset(&qry, 0, sizeof(qry));
1883
Stefan Roese260421a2006-11-13 13:55:24 +01001884 info->ext_addr = 0;
1885 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001886#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001887 info->legacy_unlock = 0;
1888#endif
wdenk5653fc32004-02-08 22:55:38 +00001889
Becky Bruce09ce9922009-02-02 16:34:51 -06001890 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001891
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001892 if (flash_detect_cfi (info, &qry)) {
1893 info->vendor = le16_to_cpu(qry.p_id);
1894 info->ext_addr = le16_to_cpu(qry.p_adr);
1895 num_erase_regions = qry.num_erase_regions;
1896
Stefan Roese260421a2006-11-13 13:55:24 +01001897 if (info->ext_addr) {
1898 info->cfi_version = (ushort) flash_read_uchar (info,
1899 info->ext_addr + 3) << 8;
1900 info->cfi_version |= (ushort) flash_read_uchar (info,
1901 info->ext_addr + 4);
1902 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001903
wdenkbf9e3b32004-02-12 00:47:09 +00001904#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001905 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001906#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001907
wdenkbf9e3b32004-02-12 00:47:09 +00001908 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001909 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001910 case CFI_CMDSET_INTEL_STANDARD:
1911 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001912 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001913 break;
1914 case CFI_CMDSET_AMD_STANDARD:
1915 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001916 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001917 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001918 default:
1919 printf("CFI: Unknown command set 0x%x\n",
1920 info->vendor);
1921 /*
1922 * Unfortunately, this means we don't know how
1923 * to get the chip back to Read mode. Might
1924 * as well try an Intel-style reset...
1925 */
1926 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1927 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001928 }
wdenkcd37d9e2004-02-10 00:03:41 +00001929
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001930 /* Do manufacturer-specific fixups */
1931 switch (info->manufacturer_id) {
1932 case 0x0001:
1933 flash_fixup_amd(info, &qry);
1934 break;
1935 case 0x001f:
1936 flash_fixup_atmel(info, &qry);
1937 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05001938 case 0x0020:
1939 flash_fixup_stm(info, &qry);
1940 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001941 }
1942
wdenkbf9e3b32004-02-12 00:47:09 +00001943 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001944 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1945 debug ("device id is 0x%x\n", info->device_id);
1946 debug ("device id2 is 0x%x\n", info->device_id2);
1947 debug ("cfi version is 0x%04x\n", info->cfi_version);
1948
wdenk5653fc32004-02-08 22:55:38 +00001949 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001950 /* if the chip is x8/x16 reduce the ratio by half */
1951 if ((info->interface == FLASH_CFI_X8X16)
1952 && (info->chipwidth == FLASH_CFI_BY8)) {
1953 size_ratio >>= 1;
1954 }
wdenkbf9e3b32004-02-12 00:47:09 +00001955 debug ("size_ratio %d port %d bits chip %d bits\n",
1956 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1957 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001958 info->size = 1 << qry.dev_size;
1959 /* multiply the size by the number of chips */
1960 info->size *= size_ratio;
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01001961 max_size = cfi_flash_bank_size(banknum);
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001962 if (max_size && (info->size > max_size)) {
1963 debug("[truncated from %ldMiB]", info->size >> 20);
1964 info->size = max_size;
1965 }
wdenkbf9e3b32004-02-12 00:47:09 +00001966 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001967 sect_cnt = 0;
1968 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001969 for (i = 0; i < num_erase_regions; i++) {
1970 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001971 printf ("%d erase regions found, only %d used\n",
1972 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001973 break;
1974 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001975
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001976 tmp = le32_to_cpu(qry.erase_region_info[i]);
1977 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001978
1979 erase_region_count = (tmp & 0xffff) + 1;
1980 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00001981 erase_region_size =
1982 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00001983 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00001984 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00001985 for (j = 0; j < erase_region_count; j++) {
Ilya Yanokec50a8e2010-10-21 17:20:12 +02001986 if (sector - base >= info->size)
1987 break;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001988 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001989 printf("ERROR: too many flash sectors\n");
1990 break;
1991 }
Becky Bruce09ce9922009-02-02 16:34:51 -06001992 info->start[sect_cnt] =
1993 (ulong)map_physmem(sector,
1994 info->portwidth,
1995 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001996 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00001997
1998 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001999 * Only read protection status from
2000 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00002001 */
2002 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04002003 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00002004 case CFI_CMDSET_INTEL_EXTENDED:
2005 case CFI_CMDSET_INTEL_STANDARD:
Stefan Roesedf4e8132010-10-25 18:31:29 +02002006 /*
2007 * Set flash to read-id mode. Otherwise
2008 * reading protected status is not
2009 * guaranteed.
2010 */
2011 flash_write_cmd(info, sect_cnt, 0,
2012 FLASH_CMD_READ_ID);
wdenka1191902005-01-09 17:12:27 +00002013 info->protect[sect_cnt] =
2014 flash_isset (info, sect_cnt,
2015 FLASH_OFFSET_PROTECT,
2016 FLASH_STATUS_PROTECT);
2017 break;
2018 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002019 /* default: not protected */
2020 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00002021 }
2022
wdenk5653fc32004-02-08 22:55:38 +00002023 sect_cnt++;
2024 }
2025 }
2026
2027 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002028 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2029 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002030 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002031 (1 << qry.block_erase_timeout_max);
2032 tmp = (1 << qry.buf_write_timeout_typ) *
2033 (1 << qry.buf_write_timeout_max);
2034
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002035 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002036 info->buffer_write_tout = (tmp + 999) / 1000;
2037 tmp = (1 << qry.word_write_timeout_typ) *
2038 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002039 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01002040 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00002041 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01002042 if ((info->interface == FLASH_CFI_X8X16) &&
2043 (info->chipwidth == FLASH_CFI_BY8)) {
2044 /* XXX - Need to test on x8/x16 in parallel. */
2045 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00002046 }
Mike Frysinger22159872008-10-02 01:55:38 -04002047
2048 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00002049 }
2050
wdenkbf9e3b32004-02-12 00:47:09 +00002051 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00002052}
2053
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002054#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002055void flash_set_verbose(uint v)
2056{
2057 flash_verbose = v;
2058}
Mike Frysinger4ffeab22010-12-22 09:41:13 -05002059#endif
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01002060
Stefan Roese6f726f92010-10-25 18:31:48 +02002061static void cfi_flash_set_config_reg(u32 base, u16 val)
2062{
2063#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2064 /*
2065 * Only set this config register if really defined
2066 * to a valid value (0xffff is invalid)
2067 */
2068 if (val == 0xffff)
2069 return;
2070
2071 /*
2072 * Set configuration register. Data is "encrypted" in the 16 lower
2073 * address bits.
2074 */
2075 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2076 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2077
2078 /*
2079 * Finally issue reset-command to bring device back to
2080 * read-array mode
2081 */
2082 flash_write16(FLASH_CMD_RESET, (void *)base);
2083#endif
2084}
2085
wdenk5653fc32004-02-08 22:55:38 +00002086/*-----------------------------------------------------------------------
2087 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002088unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00002089{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002090 unsigned long size = 0;
2091 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002092#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002093 struct apl_s {
2094 ulong start;
2095 ulong size;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002096 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002097#endif
wdenk5653fc32004-02-08 22:55:38 +00002098
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002099#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04002100 /* read environment from EEPROM */
2101 char s[64];
Wolfgang Denkcdb74972010-07-24 21:55:43 +02002102 getenv_f("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002103#endif
wdenk5653fc32004-02-08 22:55:38 +00002104
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002105 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002106 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002107 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002108
Stefan Roese6f726f92010-10-25 18:31:48 +02002109 /* Optionally write flash configuration register */
2110 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2111 cfi_flash_config_reg(i));
2112
Stefan Roeseb00e19c2010-08-30 10:11:51 +02002113 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
Anatolij Gustschin34bbb8f2010-11-28 02:13:33 +01002114 flash_get_size(cfi_flash_bank_addr(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002115 size += flash_info[i].size;
2116 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002117#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Peter Tysereddf52b2010-12-28 18:12:05 -06002118 printf ("## Unknown flash on Bank %d "
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002119 "- Size = 0x%08lx = %ld MB\n",
2120 i+1, flash_info[i].size,
John Schmoller0e3fa012010-09-29 13:49:05 -05002121 flash_info[i].size >> 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002122#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002123 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002124#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002125 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2126 /*
2127 * Only the U-Boot image and it's environment
2128 * is protected, all other sectors are
2129 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002130 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002131 * and the environment variable "unlock" is
2132 * set to "yes".
2133 */
2134 if (flash_info[i].legacy_unlock) {
2135 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002136
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002137 /*
2138 * Disable legacy_unlock temporarily,
2139 * since flash_real_protect would
2140 * relock all other sectors again
2141 * otherwise.
2142 */
2143 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002144
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002145 /*
2146 * Legacy unlocking (e.g. Intel J3) ->
2147 * unlock only one sector. This will
2148 * unlock all sectors.
2149 */
2150 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002151
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002152 flash_info[i].legacy_unlock = 1;
2153
2154 /*
2155 * Manually mark other sectors as
2156 * unlocked (unprotected)
2157 */
2158 for (k = 1; k < flash_info[i].sector_count; k++)
2159 flash_info[i].protect[k] = 0;
2160 } else {
2161 /*
2162 * No legancy unlocking -> unlock all sectors
2163 */
2164 flash_protect (FLAG_PROTECT_CLEAR,
2165 flash_info[i].start[0],
2166 flash_info[i].start[0]
2167 + flash_info[i].size - 1,
2168 &flash_info[i]);
2169 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002170 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002171#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002172 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002173
2174 /* Monitor protection ON by default */
Wolfgang Wegner8f9a2212010-03-02 10:59:19 +01002175#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2176 (!defined(CONFIG_MONITOR_IS_IN_RAM))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002177 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002178 CONFIG_SYS_MONITOR_BASE,
2179 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2180 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002181#endif
2182
2183 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +02002184#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002185 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002186 CONFIG_ENV_ADDR,
2187 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2188 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002189#endif
2190
2191 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002192#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002193 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002194 CONFIG_ENV_ADDR_REDUND,
Wolfgang Denkdfcd7f22009-05-15 00:16:03 +02002195 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002196 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002197#endif
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002198
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002199#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002200 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2201 debug("autoprotecting from %08x to %08x\n",
2202 apl[i].start, apl[i].start + apl[i].size - 1);
2203 flash_protect (FLAG_PROTECT_SET,
2204 apl[i].start,
2205 apl[i].start + apl[i].size - 1,
2206 flash_get_info(apl[i].start));
2207 }
2208#endif
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002209
2210#ifdef CONFIG_FLASH_CFI_MTD
2211 cfi_mtd_init();
2212#endif
2213
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002214 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002215}