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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manocha6a12ceb2016-02-11 15:47:19 -08002/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha6a12ceb2016-02-11 15:47:19 -08005 */
6
7#include <common.h>
Vikas Manochafd03b832017-02-12 10:25:46 -08008#include <clk.h>
Vikas Manocha6a12ceb2016-02-11 15:47:19 -08009#include <dm.h>
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080010#include <serial.h>
Patrick Delaunay215c8be2018-05-17 14:50:42 +020011#include <watchdog.h>
12#include <asm/io.h>
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090013#include <asm/arch/stm32.h>
Patrice Chotardae74de02018-01-12 09:23:49 +010014#include "serial_stm32.h"
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080015
Patrick Delaunay215c8be2018-05-17 14:50:42 +020016static void _stm32_serial_setbrg(fdt_addr_t base,
17 struct stm32_uart_info *uart_info,
18 u32 clock_rate,
19 int baudrate)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080020{
Patrick Delaunay215c8be2018-05-17 14:50:42 +020021 bool stm32f4 = uart_info->stm32f4;
Patrice Chotard27265ce2017-07-18 09:29:08 +020022 u32 int_div, mantissa, fraction, oversampling;
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090023
Patrick Delaunay215c8be2018-05-17 14:50:42 +020024 int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020025
26 if (int_div < 16) {
27 oversampling = 8;
Patrice Chotard60a996b2017-09-27 15:44:50 +020028 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020029 } else {
30 oversampling = 16;
Patrice Chotard60a996b2017-09-27 15:44:50 +020031 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
Patrice Chotard1afcf9c2017-06-08 09:26:55 +020032 }
33
34 mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
35 fraction = int_div % oversampling;
36
Patrice Chotard60a996b2017-09-27 15:44:50 +020037 writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
Patrick Delaunay215c8be2018-05-17 14:50:42 +020038}
39
40static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
41{
42 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
43
44 _stm32_serial_setbrg(plat->base, plat->uart_info,
45 plat->clock_rate, baudrate);
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080046
47 return 0;
48}
49
50static int stm32_serial_getc(struct udevice *dev)
51{
Patrice Chotard60a996b2017-09-27 15:44:50 +020052 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
53 bool stm32f4 = plat->uart_info->stm32f4;
54 fdt_addr_t base = plat->base;
Patrice Chotard7b3b74d2018-04-20 08:59:06 +020055 u32 isr = readl(base + ISR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080056
Patrice Chotard8dc4e1f2018-04-20 08:59:07 +020057 if ((isr & USART_ISR_FLAG_RXNE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080058 return -EAGAIN;
59
Patrice Chotard8dc4e1f2018-04-20 08:59:07 +020060 if (isr & USART_ISR_FLAG_ORE) {
Patrice Chotard7b3b74d2018-04-20 08:59:06 +020061 if (!stm32f4)
62 setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
63 else
64 readl(base + RDR_OFFSET(stm32f4));
65 return -EIO;
66 }
67
Patrice Chotard60a996b2017-09-27 15:44:50 +020068 return readl(base + RDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080069}
70
Patrick Delaunay215c8be2018-05-17 14:50:42 +020071static int _stm32_serial_putc(fdt_addr_t base,
72 struct stm32_uart_info *uart_info,
73 const char c)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080074{
Patrick Delaunay215c8be2018-05-17 14:50:42 +020075 bool stm32f4 = uart_info->stm32f4;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080076
Patrice Chotard8dc4e1f2018-04-20 08:59:07 +020077 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0)
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080078 return -EAGAIN;
79
Patrice Chotard60a996b2017-09-27 15:44:50 +020080 writel(c, base + TDR_OFFSET(stm32f4));
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080081
82 return 0;
83}
84
Patrick Delaunay215c8be2018-05-17 14:50:42 +020085static int stm32_serial_putc(struct udevice *dev, const char c)
86{
87 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
88
89 return _stm32_serial_putc(plat->base, plat->uart_info, c);
90}
91
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080092static int stm32_serial_pending(struct udevice *dev, bool input)
93{
Patrice Chotard60a996b2017-09-27 15:44:50 +020094 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
95 bool stm32f4 = plat->uart_info->stm32f4;
96 fdt_addr_t base = plat->base;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -080097
98 if (input)
Patrice Chotard60a996b2017-09-27 15:44:50 +020099 return readl(base + ISR_OFFSET(stm32f4)) &
Patrice Chotard8dc4e1f2018-04-20 08:59:07 +0200100 USART_ISR_FLAG_RXNE ? 1 : 0;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800101 else
Patrice Chotard60a996b2017-09-27 15:44:50 +0200102 return readl(base + ISR_OFFSET(stm32f4)) &
Patrice Chotard8dc4e1f2018-04-20 08:59:07 +0200103 USART_ISR_FLAG_TXE ? 0 : 1;
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800104}
105
Patrick Delaunay215c8be2018-05-17 14:50:42 +0200106static void _stm32_serial_init(fdt_addr_t base,
107 struct stm32_uart_info *uart_info)
108{
109 bool stm32f4 = uart_info->stm32f4;
110 u8 uart_enable_bit = uart_info->uart_enable_bit;
111
112 /* Disable uart-> enable fifo -> enable uart */
113 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
114 BIT(uart_enable_bit));
115 if (uart_info->has_fifo)
116 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
117 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
118 BIT(uart_enable_bit));
119}
120
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800121static int stm32_serial_probe(struct udevice *dev)
122{
Patrice Chotard60a996b2017-09-27 15:44:50 +0200123 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
Patrice Chotard9a212d72017-09-27 15:44:53 +0200124 struct clk clk;
Patrice Chotard9a212d72017-09-27 15:44:53 +0200125 int ret;
Patrice Chotard60a996b2017-09-27 15:44:50 +0200126
127 plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
Vikas Manochafd03b832017-02-12 10:25:46 -0800128
Vikas Manochafd03b832017-02-12 10:25:46 -0800129 ret = clk_get_by_index(dev, 0, &clk);
130 if (ret < 0)
131 return ret;
132
133 ret = clk_enable(&clk);
134 if (ret) {
135 dev_err(dev, "failed to enable clock\n");
136 return ret;
137 }
Vikas Manochafd03b832017-02-12 10:25:46 -0800138
Patrice Chotard27265ce2017-07-18 09:29:08 +0200139 plat->clock_rate = clk_get_rate(&clk);
140 if (plat->clock_rate < 0) {
141 clk_disable(&clk);
142 return plat->clock_rate;
143 };
144
Patrick Delaunay215c8be2018-05-17 14:50:42 +0200145 _stm32_serial_init(plat->base, plat->uart_info);
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800146
147 return 0;
148}
149
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800150static const struct udevice_id stm32_serial_id[] = {
Patrice Chotard6c30f152017-09-27 15:44:52 +0200151 { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
Patrice Chotard2a7ecc52017-09-27 15:44:51 +0200152 { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
153 { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800154 {}
155};
156
157static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
158{
159 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800160
Patrice Chotard60a996b2017-09-27 15:44:50 +0200161 plat->base = devfdt_get_addr(dev);
162 if (plat->base == FDT_ADDR_T_NONE)
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800163 return -EINVAL;
164
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800165 return 0;
166}
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800167
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800168static const struct dm_serial_ops stm32_serial_ops = {
169 .putc = stm32_serial_putc,
170 .pending = stm32_serial_pending,
171 .getc = stm32_serial_getc,
172 .setbrg = stm32_serial_setbrg,
173};
174
175U_BOOT_DRIVER(serial_stm32) = {
Patrice Chotardae74de02018-01-12 09:23:49 +0100176 .name = "serial_stm32",
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800177 .id = UCLASS_SERIAL,
Vikas Manocha42bf5e72017-02-12 10:25:44 -0800178 .of_match = of_match_ptr(stm32_serial_id),
179 .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
180 .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
Vikas Manocha6a12ceb2016-02-11 15:47:19 -0800181 .ops = &stm32_serial_ops,
182 .probe = stm32_serial_probe,
183 .flags = DM_FLAG_PRE_RELOC,
184};
Patrick Delaunay215c8be2018-05-17 14:50:42 +0200185
186#ifdef CONFIG_DEBUG_UART_STM32
187#include <debug_uart.h>
188static inline struct stm32_uart_info *_debug_uart_info(void)
189{
190 struct stm32_uart_info *uart_info;
191
192#if defined(CONFIG_STM32F4)
193 uart_info = &stm32f4_info;
194#elif defined(CONFIG_STM32F7)
195 uart_info = &stm32f7_info;
196#else
197 uart_info = &stm32h7_info;
198#endif
199 return uart_info;
200}
201
202static inline void _debug_uart_init(void)
203{
204 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
205 struct stm32_uart_info *uart_info = _debug_uart_info();
206
207 _stm32_serial_init(base, uart_info);
208 _stm32_serial_setbrg(base, uart_info,
209 CONFIG_DEBUG_UART_CLOCK,
210 CONFIG_BAUDRATE);
211 printf("DEBUG done\n");
212}
213
214static inline void _debug_uart_putc(int c)
215{
216 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
217 struct stm32_uart_info *uart_info = _debug_uart_info();
218
219 while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)
220 WATCHDOG_RESET();
221}
222
223DEBUG_UART_FUNCS
224#endif