blob: 8f0dec4c0ab7fd245aa9bee62d6181d9027d0983 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Dipen Dudhatd793e5a2011-07-28 14:47:28 -05002/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Dipen Dudhatd793e5a2011-07-28 14:47:28 -05004 */
5#include <common.h>
Tom Rini2f8a6db2021-12-14 13:36:40 -05006#include <clock_legacy.h>
Simon Glass94133872019-12-28 10:44:45 -07007#include <init.h>
Dipen Dudhatd793e5a2011-07-28 14:47:28 -05008#include <mpc85xx.h>
9#include <asm/io.h>
10#include <ns16550.h>
11#include <nand.h>
12#include <asm/mmu.h>
13#include <asm/immap_85xx.h>
York Sun5614e712013-09-30 09:22:09 -070014#include <fsl_ddr_sdram.h>
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050015#include <asm/fsl_law.h>
Matthew McClintock8c454042012-08-13 13:21:19 +000016#include <asm/global_data.h>
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050017
Matthew McClintock8c454042012-08-13 13:21:19 +000018DECLARE_GLOBAL_DATA_PTR;
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050019
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050020void board_init_f(ulong bootflag)
21{
Prabhakar Kushwaha0fa934d2013-04-16 13:28:12 +053022 u32 plat_ratio;
Tom Rini51552072022-10-28 20:27:12 -040023 ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050024
Tom Rini4e590942022-11-12 17:36:51 -050025#if defined(CFG_SYS_NAND_BR_PRELIM) && defined(CFG_SYS_NAND_OR_PRELIM)
26 set_lbc_br(0, CFG_SYS_NAND_BR_PRELIM);
27 set_lbc_or(0, CFG_SYS_NAND_OR_PRELIM);
Ying Zhangc9e1f582014-01-24 15:50:09 +080028#endif
29
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050030 /* initialize selected port with appropriate baud rate */
31 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
32 plat_ratio >>= 1;
Tom Rini2f8a6db2021-12-14 13:36:40 -050033 gd->bus_clk = get_board_sys_clk() * plat_ratio;
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050034
Tom Rini91092132022-11-16 13:10:28 -050035 ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
Simon Glassd30c7202020-12-22 19:30:18 -070036 gd->bus_clk / 16 / CONFIG_BAUDRATE);
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050037
38 puts("\nNAND boot... ");
39
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050040 /* copy code to RAM and jump to it - this should not return */
41 /* NOTE - code has to be copied out of NAND buffer before
42 * other blocks can be read.
43 */
Prabhakar Kushwaha0fa934d2013-04-16 13:28:12 +053044
45 relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050046}
47
48void board_init_r(gd_t *gd, ulong dest_addr)
49{
Ying Zhangc9e1f582014-01-24 15:50:09 +080050 puts("\nSecond program loader running in sram...");
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050051 nand_boot();
52}
53
54void putc(char c)
55{
56 if (c == '\n')
Tom Rini91092132022-11-16 13:10:28 -050057 ns16550_putc((struct ns16550 *)CFG_SYS_NS16550_COM1, '\r');
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050058
Tom Rini91092132022-11-16 13:10:28 -050059 ns16550_putc((struct ns16550 *)CFG_SYS_NS16550_COM1, c);
Dipen Dudhatd793e5a2011-07-28 14:47:28 -050060}
61
62void puts(const char *str)
63{
64 while (*str)
65 putc(*str++);
66}