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wdenkc0218802003-03-27 12:09:35 +00001/*
wdenk414eec32005-04-02 22:37:54 +00002 * (C) Copyright 2003-2005
wdenkc0218802003-03-27 12:09:35 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This file contains the configuration parameters for the INCA-IP board.
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
32#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
33
Daniel Schwierzeck60b74bd2011-07-27 13:22:36 +020034#define CONFIG_XWAY_SWAP_BYTES
35
Shinya Kuribayashi536884f2011-02-05 18:33:36 +090036/*
37 * Clock for the MIPS core (MHz)
38 * allowed values: 100000000, 133000000, and 150000000 (default)
39 */
40#ifndef CONFIG_CPU_CLOCK_RATE
41#define CONFIG_CPU_CLOCK_RATE 150000000
wdenke0ac62d2003-08-17 18:55:18 +000042#endif
wdenkc0218802003-03-27 12:09:35 +000043
Daniel Schwierzeck7185adb2011-07-27 13:22:37 +020044#define CONFIG_SYS_XWAY_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
wdenk3e386912003-04-05 00:53:31 +000045
46#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
47
wdenkc0218802003-03-27 12:09:35 +000048#define CONFIG_BAUDRATE 115200
49
wdenkc0218802003-03-27 12:09:35 +000050/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
wdenkc0218802003-03-27 12:09:35 +000052
wdenk3e386912003-04-05 00:53:31 +000053#define CONFIG_TIMESTAMP /* Print image info with timestamp */
54
55#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +010056 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk3e386912003-04-05 00:53:31 +000057 "echo"
58
59#undef CONFIG_BOOTARGS
60
61#define CONFIG_EXTRA_ENV_SETTINGS \
62 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010063 "nfsroot=${serverip}:${rootpath}\0" \
wdenk3e386912003-04-05 00:53:31 +000064 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010065 "addip=setenv bootargs ${bootargs} " \
66 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
67 ":${hostname}:${netdev}:off\0" \
68 "addmisc=setenv bootargs ${bootargs} " \
69 "console=ttyS0,${baudrate} " \
70 "ethaddr=${ethaddr} " \
wdenk3e386912003-04-05 00:53:31 +000071 "panic=1\0" \
72 "flash_nfs=run nfsargs addip addmisc;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010073 "bootm ${kernel_addr}\0" \
wdenk3e386912003-04-05 00:53:31 +000074 "flash_self=run ramargs addip addmisc;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010075 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
76 "net_nfs=tftp 80500000 ${bootfile};" \
wdenk3e386912003-04-05 00:53:31 +000077 "run nfsargs addip addmisc;bootm\0" \
78 "rootpath=/opt/eldk/mips_4KC\0" \
79 "bootfile=/tftpboot/INCA/uImage\0" \
80 "kernel_addr=B0040000\0" \
81 "ramdisk_addr=B0100000\0" \
82 "u-boot=/tftpboot/INCA/u-boot.bin\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010083 "load=tftp 80500000 ${u-boot}\0" \
wdenk3e386912003-04-05 00:53:31 +000084 "update=protect off 1:0-2;era 1:0-2;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010085 "cp.b 80500000 B0000000 ${filesize}\0" \
wdenk3e386912003-04-05 00:53:31 +000086 ""
87#define CONFIG_BOOTCOMMAND "run flash_self"
88
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050089
90/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -050091 * BOOTP options
92 */
93#define CONFIG_BOOTP_BOOTFILESIZE
94#define CONFIG_BOOTP_BOOTPATH
95#define CONFIG_BOOTP_GATEWAY
96#define CONFIG_BOOTP_HOSTNAME
97
98
99/*
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -0500100 * Command line configuration.
101 */
102#include <config_cmd_default.h>
103
104#define CONFIG_CMD_ASKENV
105#define CONFIG_CMD_DHCP
106#define CONFIG_CMD_ELF
107#define CONFIG_CMD_JFFS2
108#define CONFIG_CMD_NFS
109#define CONFIG_CMD_PING
110#define CONFIG_CMD_SNTP
111
wdenkc0218802003-03-27 12:09:35 +0000112
113/*
114 * Miscellaneous configurable options
115 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#define CONFIG_SYS_LONGHELP /* undef to save memory */
117#define CONFIG_SYS_PROMPT "INCA-IP # " /* Monitor Command Prompt */
118#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
119#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
120#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
wdenkc0218802003-03-27 12:09:35 +0000121
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122#define CONFIG_SYS_MALLOC_LEN 128*1024
wdenk3e386912003-04-05 00:53:31 +0000123
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
wdenk3e386912003-04-05 00:53:31 +0000125
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_MIPS_TIMER_FREQ (incaip_get_cpuclk() / 2)
Shinya Kuribayashia55d4812008-06-05 22:29:00 +0900127
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200128#define CONFIG_SYS_HZ 1000
wdenk3e386912003-04-05 00:53:31 +0000129
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130#define CONFIG_SYS_SDRAM_BASE 0x80000000
wdenk3e386912003-04-05 00:53:31 +0000131
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */
wdenkc0218802003-03-27 12:09:35 +0000133
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_MEMTEST_START 0x80100000
135#define CONFIG_SYS_MEMTEST_END 0x80800000
wdenkc0218802003-03-27 12:09:35 +0000136
137/*-----------------------------------------------------------------------
138 * FLASH and environment organization
139 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
141#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
wdenkc0218802003-03-27 12:09:35 +0000142
143#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */
144#define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */
145
146/* The following #defines are needed to get flash environment right */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200147#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#define CONFIG_SYS_MONITOR_LEN (192 << 10)
wdenkc0218802003-03-27 12:09:35 +0000149
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
wdenkc0218802003-03-27 12:09:35 +0000151
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenkc0218802003-03-27 12:09:35 +0000153
154/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
156#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenkc0218802003-03-27 12:09:35 +0000157
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200158#define CONFIG_ENV_IS_IN_FLASH 1
wdenkc0218802003-03-27 12:09:35 +0000159
160/* Address and size of Primary Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200161#define CONFIG_ENV_ADDR 0xB0030000
162#define CONFIG_ENV_SIZE 0x10000
wdenkc0218802003-03-27 12:09:35 +0000163
164#define CONFIG_FLASH_16BIT
165
166#define CONFIG_NR_DRAM_BANKS 1
167
168#define CONFIG_INCA_IP_SWITCH
169#define CONFIG_NET_MULTI
wdenk0c852a22004-02-26 23:01:04 +0000170#define CONFIG_INCA_IP_SWITCH_AMDIX
wdenkc0218802003-03-27 12:09:35 +0000171
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200172/*
173 * JFFS2 partitions
174 */
175/* No command line, one static partition, use all space on the device */
Stefan Roese68d7d652009-03-19 13:30:36 +0100176#undef CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200177#define CONFIG_JFFS2_DEV "nor1"
178#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
179#define CONFIG_JFFS2_PART_OFFSET 0x00000000
180
181/* mtdparts command line support */
182/*
Stefan Roese68d7d652009-03-19 13:30:36 +0100183#define CONFIG_CMD_MTDPARTS
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200184#define MTDIDS_DEFAULT "nor0=INCA-IP Bank 0"
185#define MTDPARTS_DEFAULT "mtdparts=INCA-IP Bank 0:192k(uboot)," \
186 "64k(env)," \
187 "768k(linux)," \
188 "1m@3m(rootfs)," \
189 "768k(linux2)," \
190 "3m@5m(rootfs2)"
191*/
wdenk5c745d22003-12-12 00:02:26 +0000192
wdenkc0218802003-03-27 12:09:35 +0000193/*-----------------------------------------------------------------------
194 * Cache Configuration
195 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_DCACHE_SIZE 4096
197#define CONFIG_SYS_ICACHE_SIZE 4096
198#define CONFIG_SYS_CACHELINE_SIZE 16
wdenkc0218802003-03-27 12:09:35 +0000199
200#endif /* __CONFIG_H */