blob: b6cc417333854981d495c8f6204993c48bca92f0 [file] [log] [blame]
Sricharan508a58f2011-11-15 09:49:55 -05001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated, <www.ti.com>
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Sricharan508a58f2011-11-15 09:49:55 -05008 */
9#include <common.h>
Nishanth Menoncb199102013-03-26 05:20:54 +000010#include <palmas.h>
Kishon Vijay Abraham I7ba792c2015-08-19 14:13:20 +053011#include <asm/arch/omap.h>
Sricharan508a58f2011-11-15 09:49:55 -050012#include <asm/arch/sys_proto.h>
13#include <asm/arch/mmc_host_def.h>
Dan Murphyfdce7b62013-07-11 13:10:28 -050014#include <tca642x.h>
Kishon Vijay Abraham I7ba792c2015-08-19 14:13:20 +053015#include <usb.h>
16#include <linux/usb/gadget.h>
17#include <dwc3-uboot.h>
18#include <dwc3-omap-uboot.h>
19#include <ti-usb-phy-uboot.h>
Sricharan508a58f2011-11-15 09:49:55 -050020
21#include "mux_data.h"
22
Tom Rini8850c5d2017-05-12 22:33:27 -040023#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
Dan Murphye9024ef2014-02-03 06:59:02 -060024#include <sata.h>
Dan Murphy5e5cfaf2013-08-01 14:05:59 -050025#include <usb.h>
Dan Murphy1572ead2013-08-01 14:06:02 -050026#include <asm/gpio.h>
Dan Murphy5e5cfaf2013-08-01 14:05:59 -050027#include <asm/arch/clock.h>
28#include <asm/arch/ehci.h>
29#include <asm/ehci-omap.h>
Roger Quadrosafdc6322013-11-11 16:56:42 +020030#include <asm/arch/sata.h>
Dan Murphy04025b42013-08-01 14:06:00 -050031
32#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
33#define DIE_ID_REG_OFFSET 0x200
34
Dan Murphy5e5cfaf2013-08-01 14:05:59 -050035#endif
36
Sricharan508a58f2011-11-15 09:49:55 -050037DECLARE_GLOBAL_DATA_PTR;
38
39const struct omap_sysinfo sysinfo = {
Dan Murphy5a7bd382013-08-01 14:05:56 -050040 "Board: OMAP5432 uEVM\n"
Sricharan508a58f2011-11-15 09:49:55 -050041};
42
43/**
Dan Murphyfdce7b62013-07-11 13:10:28 -050044 * @brief tca642x_init - uEVM default values for the GPIO expander
45 * input reg, output reg, polarity reg, configuration reg
46 */
47struct tca642x_bank_info tca642x_init[] = {
48 { .input_reg = 0x00,
49 .output_reg = 0x04,
50 .polarity_reg = 0x00,
51 .configuration_reg = 0x80 },
52 { .input_reg = 0x00,
53 .output_reg = 0x00,
54 .polarity_reg = 0x00,
55 .configuration_reg = 0xff },
56 { .input_reg = 0x00,
57 .output_reg = 0x00,
58 .polarity_reg = 0x00,
59 .configuration_reg = 0x40 },
60};
61
Kishon Vijay Abraham I7ba792c2015-08-19 14:13:20 +053062#ifdef CONFIG_USB_DWC3
63static struct dwc3_device usb_otg_ss = {
64 .maximum_speed = USB_SPEED_SUPER,
65 .base = OMAP5XX_USB_OTG_SS_BASE,
66 .tx_fifo_resize = false,
67 .index = 0,
68};
69
70static struct dwc3_omap_device usb_otg_ss_glue = {
71 .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE,
72 .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
73 .index = 0,
74};
75
76static struct ti_usb_phy_device usb_phy_device = {
77 .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL,
78 .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER,
79 .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER,
80 .index = 0,
81};
82
83int board_usb_init(int index, enum usb_init_type init)
84{
85 if (index) {
86 printf("Invalid Controller Index\n");
87 return -EINVAL;
88 }
89
90 if (init == USB_INIT_DEVICE) {
91 usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL;
92 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
93 } else {
94 usb_otg_ss.dr_mode = USB_DR_MODE_HOST;
95 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
96 }
97
Kishon Vijay Abraham I6f1af1e2015-08-19 16:16:27 +053098 enable_usb_clocks(index);
Kishon Vijay Abraham I7ba792c2015-08-19 14:13:20 +053099 ti_usb_phy_uboot_init(&usb_phy_device);
100 dwc3_omap_uboot_init(&usb_otg_ss_glue);
101 dwc3_uboot_init(&usb_otg_ss);
102
103 return 0;
104}
105
106int board_usb_cleanup(int index, enum usb_init_type init)
107{
108 if (index) {
109 printf("Invalid Controller Index\n");
110 return -EINVAL;
111 }
112
113 ti_usb_phy_uboot_exit(index);
114 dwc3_uboot_exit(index);
115 dwc3_omap_uboot_exit(index);
Kishon Vijay Abraham I6f1af1e2015-08-19 16:16:27 +0530116 disable_usb_clocks(index);
Kishon Vijay Abraham I7ba792c2015-08-19 14:13:20 +0530117
118 return 0;
119}
120
121int usb_gadget_handle_interrupts(int index)
122{
123 u32 status;
124
125 status = dwc3_omap_uboot_interrupt_status(index);
126 if (status)
127 dwc3_uboot_handle_interrupt(index);
128
129 return 0;
130}
131#endif
132
Dan Murphyfdce7b62013-07-11 13:10:28 -0500133/**
Sricharan508a58f2011-11-15 09:49:55 -0500134 * @brief board_init
135 *
136 * @return 0
137 */
138int board_init(void)
139{
140 gpmc_init();
Tom Rini94ba26f2017-01-25 20:42:35 -0500141 gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
Sricharan508a58f2011-11-15 09:49:55 -0500142 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
143
Dan Murphyfdce7b62013-07-11 13:10:28 -0500144 tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
145
Sricharan508a58f2011-11-15 09:49:55 -0500146 return 0;
147}
148
149int board_eth_init(bd_t *bis)
150{
151 return 0;
152}
153
Tom Rini8850c5d2017-05-12 22:33:27 -0400154#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_XHCI_OMAP)
Dan Murphy96805532013-08-26 08:54:53 -0500155static void enable_host_clocks(void)
156{
157 int auxclk;
158 int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
159 OPTFCLKEN_HSIC480M_P3_CLK |
160 OPTFCLKEN_HSIC60M_P2_CLK |
161 OPTFCLKEN_HSIC480M_P2_CLK |
162 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
163
164 /* Enable port 2 and 3 clocks*/
165 setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
166
167 /* Enable port 2 and 3 usb host ports tll clocks*/
168 setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
169 (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
170#ifdef CONFIG_USB_XHCI_OMAP
171 /* Enable the USB OTG Super speed clocks */
172 setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
173 (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
174#endif
175
176 auxclk = readl((*prcm)->scrm_auxclk1);
177 /* Request auxilary clock */
178 auxclk |= AUXCLK_ENABLE_MASK;
179 writel(auxclk, (*prcm)->scrm_auxclk1);
180}
181#endif
182
Sricharan508a58f2011-11-15 09:49:55 -0500183/**
184 * @brief misc_init_r - Configure EVM board specific configurations
185 * such as power configurations, ethernet initialization as phase2 of
186 * boot sequence
187 *
188 * @return 0
189 */
190int misc_init_r(void)
191{
Nishanth Menoncb199102013-03-26 05:20:54 +0000192#ifdef CONFIG_PALMAS_POWER
Nishanth Menon12733882013-03-26 05:20:55 +0000193 palmas_init_settings();
Sricharan508a58f2011-11-15 09:49:55 -0500194#endif
Dan Murphy96805532013-08-26 08:54:53 -0500195
Paul Kocialkowski07815eb2015-08-27 19:37:12 +0200196 omap_die_id_usbethaddr();
Dan Murphyea02b652013-10-11 12:28:19 -0500197
Sricharan508a58f2011-11-15 09:49:55 -0500198 return 0;
199}
200
Paul Kocialkowski3ef56e62016-02-27 19:18:56 +0100201void set_muxconf_regs(void)
Sricharan508a58f2011-11-15 09:49:55 -0500202{
Lokesh Vutla9239f5b2013-05-30 02:54:30 +0000203 do_set_mux((*ctrl)->control_padconf_core_base,
204 core_padconf_array_essential,
Sricharan508a58f2011-11-15 09:49:55 -0500205 sizeof(core_padconf_array_essential) /
206 sizeof(struct pad_conf_entry));
207
Lokesh Vutla9239f5b2013-05-30 02:54:30 +0000208 do_set_mux((*ctrl)->control_padconf_wkup_base,
209 wkup_padconf_array_essential,
Sricharan508a58f2011-11-15 09:49:55 -0500210 sizeof(wkup_padconf_array_essential) /
211 sizeof(struct pad_conf_entry));
212}
213
Masahiro Yamada4aa2ba32017-05-09 20:31:39 +0900214#if defined(CONFIG_MMC)
Sricharan508a58f2011-11-15 09:49:55 -0500215int board_mmc_init(bd_t *bis)
216{
Nikita Kiryanove3913f52012-12-03 02:19:47 +0000217 omap_mmc_init(0, 0, 0, -1, -1);
218 omap_mmc_init(1, 0, 0, -1, -1);
Sricharan508a58f2011-11-15 09:49:55 -0500219 return 0;
220}
221#endif
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500222
Tom Rini8850c5d2017-05-12 22:33:27 -0400223#ifdef CONFIG_USB_EHCI_HCD
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500224static struct omap_usbhs_board_data usbhs_bdata = {
225 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
226 .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
227 .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
228};
229
Troy Kisky127efc42013-10-10 15:27:57 -0700230int ehci_hcd_init(int index, enum usb_init_type init,
231 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500232{
233 int ret;
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500234
235 enable_host_clocks();
236
Mateusz Zalega16297cf2013-10-04 19:22:26 +0200237 ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500238 if (ret < 0) {
239 puts("Failed to initialize ehci\n");
240 return ret;
241 }
242
243 return 0;
244}
245
246int ehci_hcd_stop(void)
247{
Masahiro Yamada63a75782016-09-06 22:17:38 +0900248 return omap_ehci_hcd_stop();
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500249}
Dan Murphy1572ead2013-08-01 14:06:02 -0500250
251void usb_hub_reset_devices(int port)
252{
253 /* The LAN9730 needs to be reset after the port power has been set. */
254 if (port == 3) {
255 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
256 udelay(10);
257 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
258 }
259}
Dan Murphy5e5cfaf2013-08-01 14:05:59 -0500260#endif
Dan Murphy96805532013-08-26 08:54:53 -0500261
262#ifdef CONFIG_USB_XHCI_OMAP
263/**
264 * @brief board_usb_init - Configure EVM board specific configurations
265 * for the LDO's and clocks for the USB blocks.
266 *
267 * @return 0
268 */
Troy Kisky7e575c42013-10-22 14:27:17 -0700269int board_usb_init(int index, enum usb_init_type init)
Dan Murphy96805532013-08-26 08:54:53 -0500270{
271 int ret;
272#ifdef CONFIG_PALMAS_USB_SS_PWR
273 ret = palmas_enable_ss_ldo();
274#endif
275
276 enable_host_clocks();
277
278 return 0;
279}
280#endif