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Stefan Roese6e7fb6e2005-11-29 18:18:21 +01001/*
2 * (C) Copyright 2005
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 * John Otken, jotken@softadvances.com
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/************************************************************************
26 * luan.h - configuration for LUAN board
27 ***********************************************************************/
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34#define CONFIG_LUAN 1 /* Board is Luan */
35#define CONFIG_440SP 1 /* Specific PPC440SP support */
36#define CONFIG_4xx 1 /* PPC4xx family */
37#define CONFIG_440 1
38#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
39
Stefan Roese490f2042008-06-06 15:55:03 +020040/*
41 * Include common defines/options for all AMCC eval boards
42 */
43#define CONFIG_HOSTNAME luan
44#include "amcc-common.h"
45
Stefan Roese00cdb4c2007-03-08 10:13:16 +010046#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010047#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
48
49/*-----------------------------------------------------------------------
50 * Base addresses -- Note these are effective addresses where the
51 * actual resources get mapped (not physical addresses)
52 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */
54#define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */
55#define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */
56#define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010057
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010059
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_PERIPHERAL_BASE 0xf0000000 /* internal peripherals */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010061
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020062#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
63#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
64#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010065
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066#if CONFIG_SYS_LARGE_FLASH == 0xffc00000
67#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LARGE_FLASH
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010068#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SMALL_FLASH
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010070#endif
71
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072#if CONFIG_SYS_SRAM_BASE
73#define CONFIG_SYS_KBYTES_SDRAM 1024*2
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010074#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020075#define CONFIG_SYS_KBYTES_SDRAM 1024
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010076#endif
77
78/*-----------------------------------------------------------------------
79 * Initial RAM & stack pointer (placed in SDRAM)
80 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE
82#define CONFIG_SYS_INIT_RAM_END (8 << 10)
83#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
84#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
85#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010086
87/*-----------------------------------------------------------------------
88 * Serial Port
89 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010091#undef CONFIG_UART1_CONSOLE /* define if you want console on UART1 */
92
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010093/*-----------------------------------------------------------------------
94 * Environment
95 *----------------------------------------------------------------------*/
96/*
97 * Define here the location of the environment variables (FLASH or EEPROM).
98 * Note: DENX encourages to use redundant environment in FLASH.
99 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200100#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100101
102/*-----------------------------------------------------------------------
103 * FLASH related
104 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */
106#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100107
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200108#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
109#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100110
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100112
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113#define CONFIG_SYS_FLASH_ADDR0 0x555
114#define CONFIG_SYS_FLASH_ADDR1 0x2aa
115#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100116
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200117#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200118#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200120#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100121
122/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200123#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
124#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200125#endif /* CONFIG_ENV_IS_IN_FLASH */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100126
127/*-----------------------------------------------------------------------
128 * DDR SDRAM
129 *----------------------------------------------------------------------*/
Stefan Roese00cdb4c2007-03-08 10:13:16 +0100130#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
131#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
Stefan Roesee4bbed22007-06-01 13:45:24 +0200132#define CONFIG_DDR_ECC 1 /* with ECC support */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100133
134/*-----------------------------------------------------------------------
135 * I2C
136 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100138
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139#define CONFIG_SYS_I2C_MULTI_EEPROMS
140#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
141#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
142#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
143#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
Stefan Roese4f92ed52006-08-07 14:33:32 +0200144
Stefan Roese490f2042008-06-06 15:55:03 +0200145/*
146 * Default environment variables
147 */
148#define CONFIG_EXTRA_ENV_SETTINGS \
149 CONFIG_AMCC_DEF_ENV \
150 CONFIG_AMCC_DEF_ENV_PPC \
151 CONFIG_AMCC_DEF_ENV_NOR_UPD \
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100152 "kernel_addr=fc000000\0" \
153 "ramdisk_addr=fc100000\0" \
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100154 ""
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100155
Stefan Roesea00eccf2008-05-08 11:05:15 +0200156#define CONFIG_HAS_ETH0
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100157#define CONFIG_PHY_ADDR 1
158#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
159#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
160
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100161#ifdef DEBUG
162#define CONFIG_PANIC_HANG
163#else
164#define CONFIG_HW_WATCHDOG /* watchdog */
165#endif
166
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500167/*
Stefan Roese490f2042008-06-06 15:55:03 +0200168 * Commands additional to the ones defined in amcc-common.h
Jon Loeliger7f5c0152007-07-10 09:38:02 -0500169 */
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500170#define CONFIG_CMD_PCI
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500171#define CONFIG_CMD_SDRAM
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100172
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100173/*-----------------------------------------------------------------------
174 * PCI stuff
175 *-----------------------------------------------------------------------
176 */
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500177#if defined(CONFIG_CMD_PCI)
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100178
179/* General PCI */
180#define CONFIG_PCI /* include pci support */
181#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */
182#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
183
184/* Board-specific PCI */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_PCI_TARGET_INIT
186#undef CONFIG_SYS_PCI_MASTER_INIT
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100187
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
189#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100190
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500191#endif
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100192
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100193#endif /* __CONFIG_H */