Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2018 Amlogic, Inc. All rights reserved. |
| 4 | */ |
| 5 | |
Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 6 | #include "meson-g12.dtsi" |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 7 | |
| 8 | / { |
| 9 | compatible = "amlogic,g12a"; |
| 10 | |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 11 | cpus { |
| 12 | #address-cells = <0x2>; |
| 13 | #size-cells = <0x0>; |
| 14 | |
| 15 | cpu0: cpu@0 { |
| 16 | device_type = "cpu"; |
| 17 | compatible = "arm,cortex-a53"; |
| 18 | reg = <0x0 0x0>; |
| 19 | enable-method = "psci"; |
| 20 | next-level-cache = <&l2>; |
Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 21 | #cooling-cells = <2>; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 22 | }; |
| 23 | |
| 24 | cpu1: cpu@1 { |
| 25 | device_type = "cpu"; |
| 26 | compatible = "arm,cortex-a53"; |
| 27 | reg = <0x0 0x1>; |
| 28 | enable-method = "psci"; |
| 29 | next-level-cache = <&l2>; |
Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 30 | #cooling-cells = <2>; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 31 | }; |
| 32 | |
| 33 | cpu2: cpu@2 { |
| 34 | device_type = "cpu"; |
| 35 | compatible = "arm,cortex-a53"; |
| 36 | reg = <0x0 0x2>; |
| 37 | enable-method = "psci"; |
| 38 | next-level-cache = <&l2>; |
Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 39 | #cooling-cells = <2>; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 40 | }; |
| 41 | |
| 42 | cpu3: cpu@3 { |
| 43 | device_type = "cpu"; |
| 44 | compatible = "arm,cortex-a53"; |
| 45 | reg = <0x0 0x3>; |
| 46 | enable-method = "psci"; |
| 47 | next-level-cache = <&l2>; |
Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 48 | #cooling-cells = <2>; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 49 | }; |
| 50 | |
| 51 | l2: l2-cache0 { |
| 52 | compatible = "cache"; |
Neil Armstrong | 2acbc33 | 2023-01-19 14:44:17 +0100 | [diff] [blame] | 53 | cache-level = <2>; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 54 | }; |
| 55 | }; |
| 56 | |
Andreas Färber | 1a87cc7 | 2019-10-09 16:03:54 +0200 | [diff] [blame] | 57 | cpu_opp_table: opp-table { |
| 58 | compatible = "operating-points-v2"; |
| 59 | opp-shared; |
Neil Armstrong | b1e81e6 | 2019-05-28 10:50:36 +0200 | [diff] [blame] | 60 | |
Andreas Färber | 1a87cc7 | 2019-10-09 16:03:54 +0200 | [diff] [blame] | 61 | opp-100000000 { |
| 62 | opp-hz = /bits/ 64 <100000000>; |
| 63 | opp-microvolt = <731000>; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 64 | }; |
Neil Armstrong | b1e81e6 | 2019-05-28 10:50:36 +0200 | [diff] [blame] | 65 | |
Andreas Färber | 1a87cc7 | 2019-10-09 16:03:54 +0200 | [diff] [blame] | 66 | opp-250000000 { |
| 67 | opp-hz = /bits/ 64 <250000000>; |
| 68 | opp-microvolt = <731000>; |
| 69 | }; |
| 70 | |
| 71 | opp-500000000 { |
| 72 | opp-hz = /bits/ 64 <500000000>; |
| 73 | opp-microvolt = <731000>; |
| 74 | }; |
| 75 | |
| 76 | opp-667000000 { |
| 77 | opp-hz = /bits/ 64 <666666666>; |
| 78 | opp-microvolt = <731000>; |
| 79 | }; |
| 80 | |
| 81 | opp-1000000000 { |
| 82 | opp-hz = /bits/ 64 <1000000000>; |
| 83 | opp-microvolt = <731000>; |
| 84 | }; |
| 85 | |
| 86 | opp-1200000000 { |
| 87 | opp-hz = /bits/ 64 <1200000000>; |
| 88 | opp-microvolt = <731000>; |
| 89 | }; |
| 90 | |
| 91 | opp-1398000000 { |
| 92 | opp-hz = /bits/ 64 <1398000000>; |
| 93 | opp-microvolt = <761000>; |
| 94 | }; |
| 95 | |
| 96 | opp-1512000000 { |
| 97 | opp-hz = /bits/ 64 <1512000000>; |
| 98 | opp-microvolt = <791000>; |
| 99 | }; |
| 100 | |
| 101 | opp-1608000000 { |
| 102 | opp-hz = /bits/ 64 <1608000000>; |
| 103 | opp-microvolt = <831000>; |
| 104 | }; |
| 105 | |
| 106 | opp-1704000000 { |
| 107 | opp-hz = /bits/ 64 <1704000000>; |
| 108 | opp-microvolt = <861000>; |
| 109 | }; |
| 110 | |
| 111 | opp-1800000000 { |
| 112 | opp-hz = /bits/ 64 <1800000000>; |
| 113 | opp-microvolt = <981000>; |
Neil Armstrong | b1e81e6 | 2019-05-28 10:50:36 +0200 | [diff] [blame] | 114 | }; |
| 115 | }; |
Andreas Färber | 1a87cc7 | 2019-10-09 16:03:54 +0200 | [diff] [blame] | 116 | }; |
Neil Armstrong | b1e81e6 | 2019-05-28 10:50:36 +0200 | [diff] [blame] | 117 | |
Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 118 | &cpu_thermal { |
| 119 | cooling-maps { |
| 120 | map0 { |
| 121 | trip = <&cpu_passive>; |
| 122 | cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| 123 | <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| 124 | <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| 125 | <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| 126 | }; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 127 | |
Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 128 | map1 { |
| 129 | trip = <&cpu_hot>; |
| 130 | cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| 131 | <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| 132 | <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, |
| 133 | <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| 134 | }; |
| 135 | }; |
Neil Armstrong | f9e6054 | 2019-03-08 15:09:40 +0100 | [diff] [blame] | 136 | }; |
Neil Armstrong | 2acbc33 | 2023-01-19 14:44:17 +0100 | [diff] [blame] | 137 | |
| 138 | &pmu { |
| 139 | compatible = "amlogic,g12a-ddr-pmu"; |
| 140 | }; |