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Haavard Skinnemoen6b443942007-04-14 17:11:49 +02001/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#include <common.h>
23
24#include <asm/io.h>
25#include <asm/sdram.h>
Haavard Skinnemoend38da532008-01-23 17:20:14 +010026#include <asm/arch/clk.h>
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020027#include <asm/arch/gpio.h>
Haavard Skinnemoen44453b22008-04-30 14:19:28 +020028#include <asm/arch/hmatrix.h>
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020029
30DECLARE_GLOBAL_DATA_PTR;
31
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020032static const struct sdram_config sdram_config = {
33 .data_bits = SDRAM_DATA_16BIT,
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020034 .row_bits = 13,
35 .col_bits = 9,
36 .bank_bits = 2,
37 .cas = 3,
38 .twr = 2,
39 .trc = 7,
40 .trp = 2,
41 .trcd = 2,
42 .tras = 5,
43 .txsr = 5,
Haavard Skinnemoend38da532008-01-23 17:20:14 +010044 /* 7.81 us */
45 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020046};
47
48int board_early_init_f(void)
49{
Haavard Skinnemoen44453b22008-04-30 14:19:28 +020050 /* Enable SDRAM in the EBI mux */
51 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020052
53 gpio_enable_ebi();
54 gpio_enable_usart1();
55
56#if defined(CONFIG_MACB)
57 gpio_enable_macb0();
58 gpio_enable_macb1();
59#endif
60#if defined(CONFIG_MMC)
61 gpio_enable_mmci();
62#endif
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +020063#if defined(CONFIG_ATMEL_SPI)
64 gpio_enable_spi0(1 << 0);
65#endif
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020066
67 return 0;
68}
69
Becky Bruce9973e3c2008-06-09 16:03:40 -050070phys_size_t initdram(int board_type)
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020071{
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020072 unsigned long expected_size;
73 unsigned long actual_size;
74 void *sdram_base;
75
76 sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
77
78 expected_size = sdram_init(sdram_base, &sdram_config);
79 actual_size = get_ram_size(sdram_base, expected_size);
80
81 unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
82
83 if (expected_size != actual_size)
84 printf("Warning: Only %u of %u MiB SDRAM is working\n",
85 actual_size >> 20, expected_size >> 20);
86
87 return actual_size;
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020088}
89
90void board_init_info(void)
91{
92 gd->bd->bi_phy_id[0] = 0x01;
93 gd->bd->bi_phy_id[1] = 0x03;
94}
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +020095
Ben Warrenc8c845c2008-07-05 00:08:48 -070096extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
97
98#ifdef CONFIG_CMD_NET
99int board_eth_init(bd_t *bi)
100{
101 macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
102 macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
103 return 0;
104}
105#endif
106
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +0200107/* SPI chip select control */
108#ifdef CONFIG_ATMEL_SPI
109#include <spi.h>
110
111#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA3
112
113int spi_cs_is_valid(unsigned int bus, unsigned int cs)
114{
115 return bus == 0 && cs == 0;
116}
117
118void spi_cs_activate(struct spi_slave *slave)
119{
120 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
121}
122
123void spi_cs_deactivate(struct spi_slave *slave)
124{
125 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
126}
127#endif /* CONFIG_ATMEL_SPI */