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Kumar Gala83d40df2008-01-16 01:13:58 -06001/*
Poonam Aggrwalb8cdd012011-01-13 21:39:27 +05302 * Copyright 2008-2011 Freescale Semiconductor, Inc.
Kumar Gala83d40df2008-01-16 01:13:58 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
Kumar Gala76396752011-02-03 09:02:13 -060027#include <linux/compiler.h>
Kumar Gala83d40df2008-01-16 01:13:58 -060028#include <asm/fsl_law.h>
29#include <asm/io.h>
30
Kumar Galaf0600542008-06-11 00:44:10 -050031DECLARE_GLOBAL_DATA_PTR;
32
Kumar Gala243be8e2011-01-19 03:05:26 -060033#define FSL_HW_NUM_LAWS CONFIG_SYS_FSL_NUM_LAWS
Kumar Gala83d40df2008-01-16 01:13:58 -060034
Kumar Gala418ec852009-03-19 02:32:23 -050035#ifdef CONFIG_FSL_CORENET
Becky Brucee71755f2010-06-17 11:37:23 -050036#define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
37#define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
38#define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
39#define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
40#define LAWBAR_SHIFT 0
41#else
42#define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
43#define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
44#define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
45#define LAWBAR_SHIFT 12
46#endif
47
48
49static inline phys_addr_t get_law_base_addr(int idx)
50{
51#ifdef CONFIG_FSL_CORENET
52 return (phys_addr_t)
53 ((u64)in_be32(LAWBARH_ADDR(idx)) << 32) |
54 in_be32(LAWBARL_ADDR(idx));
55#else
56 return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT;
57#endif
58}
59
60static inline void set_law_base_addr(int idx, phys_addr_t addr)
61{
62#ifdef CONFIG_FSL_CORENET
63 out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff);
64 out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32);
65#else
66 out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT);
67#endif
68}
69
Kumar Gala418ec852009-03-19 02:32:23 -050070void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
71{
Kumar Gala418ec852009-03-19 02:32:23 -050072 gd->used_laws |= (1 << idx);
73
Becky Brucee71755f2010-06-17 11:37:23 -050074 out_be32(LAWAR_ADDR(idx), 0);
75 set_law_base_addr(idx, addr);
76 out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz);
Kumar Gala418ec852009-03-19 02:32:23 -050077
78 /* Read back so that we sync the writes */
Becky Brucee71755f2010-06-17 11:37:23 -050079 in_be32(LAWAR_ADDR(idx));
Kumar Gala418ec852009-03-19 02:32:23 -050080}
81
82void disable_law(u8 idx)
83{
Kumar Gala418ec852009-03-19 02:32:23 -050084 gd->used_laws &= ~(1 << idx);
85
Becky Brucee71755f2010-06-17 11:37:23 -050086 out_be32(LAWAR_ADDR(idx), 0);
87 set_law_base_addr(idx, 0);
Kumar Gala418ec852009-03-19 02:32:23 -050088
89 /* Read back so that we sync the writes */
Becky Brucee71755f2010-06-17 11:37:23 -050090 in_be32(LAWAR_ADDR(idx));
Kumar Gala418ec852009-03-19 02:32:23 -050091
92 return;
93}
94
Kumar Gala24b17d82009-09-30 08:39:44 -050095#ifndef CONFIG_NAND_SPL
Kumar Gala418ec852009-03-19 02:32:23 -050096static int get_law_entry(u8 i, struct law_entry *e)
97{
Kumar Gala418ec852009-03-19 02:32:23 -050098 u32 lawar;
99
Becky Brucee71755f2010-06-17 11:37:23 -0500100 lawar = in_be32(LAWAR_ADDR(i));
Kumar Gala418ec852009-03-19 02:32:23 -0500101
102 if (!(lawar & LAW_EN))
103 return 0;
104
Becky Brucee71755f2010-06-17 11:37:23 -0500105 e->addr = get_law_base_addr(i);
Kumar Gala418ec852009-03-19 02:32:23 -0500106 e->size = lawar & 0x3f;
107 e->trgt_id = (lawar >> 20) & 0xff;
108
109 return 1;
110}
Kumar Gala24b17d82009-09-30 08:39:44 -0500111#endif
Kumar Gala418ec852009-03-19 02:32:23 -0500112
Kumar Galaf0600542008-06-11 00:44:10 -0500113int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
114{
115 u32 idx = ffz(gd->used_laws);
116
117 if (idx >= FSL_HW_NUM_LAWS)
118 return -1;
119
120 set_law(idx, addr, sz, id);
121
122 return idx;
123}
124
Mingkai Hu7da53352009-09-11 14:19:10 +0800125#ifndef CONFIG_NAND_SPL
Kumar Galaba04f702008-06-10 16:16:02 -0500126int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
127{
128 u32 idx;
129
130 /* we have no LAWs free */
131 if (gd->used_laws == -1)
132 return -1;
133
134 /* grab the last free law */
135 idx = __ilog2(~(gd->used_laws));
136
137 if (idx >= FSL_HW_NUM_LAWS)
138 return -1;
139
140 set_law(idx, addr, sz, id);
141
142 return idx;
143}
144
Kumar Gala418ec852009-03-19 02:32:23 -0500145struct law_entry find_law(phys_addr_t addr)
Kumar Gala83d40df2008-01-16 01:13:58 -0600146{
Kumar Gala418ec852009-03-19 02:32:23 -0500147 struct law_entry entry;
148 int i;
Kumar Gala83d40df2008-01-16 01:13:58 -0600149
Kumar Gala418ec852009-03-19 02:32:23 -0500150 entry.index = -1;
151 entry.addr = 0;
152 entry.size = 0;
153 entry.trgt_id = 0;
Kumar Galaf0600542008-06-11 00:44:10 -0500154
Kumar Gala418ec852009-03-19 02:32:23 -0500155 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
156 u64 upper;
Kumar Gala83d40df2008-01-16 01:13:58 -0600157
Kumar Gala418ec852009-03-19 02:32:23 -0500158 if (!get_law_entry(i, &entry))
159 continue;
160
161 upper = entry.addr + (2ull << entry.size);
162 if ((addr >= entry.addr) && (addr < upper)) {
163 entry.index = i;
164 break;
165 }
166 }
167
168 return entry;
Kumar Gala83d40df2008-01-16 01:13:58 -0600169}
170
Becky Bruceddcebcb2008-01-23 16:31:05 -0600171void print_laws(void)
172{
Becky Bruceddcebcb2008-01-23 16:31:05 -0600173 int i;
Becky Brucee71755f2010-06-17 11:37:23 -0500174 u32 lawar;
Becky Bruceddcebcb2008-01-23 16:31:05 -0600175
176 printf("\nLocal Access Window Configuration\n");
Becky Brucee71755f2010-06-17 11:37:23 -0500177 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
178 lawar = in_be32(LAWAR_ADDR(i));
Becky Bruce11a3de42010-06-17 11:37:24 -0500179#ifdef CONFIG_FSL_CORENET
180 printf("LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x",
181 i, in_be32(LAWBARH_ADDR(i)),
182 i, in_be32(LAWBARL_ADDR(i)));
183#else
Becky Brucee71755f2010-06-17 11:37:23 -0500184 printf("LAWBAR%02d: 0x%08x", i, in_be32(LAWBAR_ADDR(i)));
Becky Bruce11a3de42010-06-17 11:37:24 -0500185#endif
Kumar Gala8e29eba2011-02-12 15:34:08 -0600186 printf(" LAWAR%02d: 0x%08x\n", i, lawar);
Becky Brucee71755f2010-06-17 11:37:23 -0500187 printf("\t(EN: %d TGT: 0x%02x SIZE: ",
188 (lawar & LAW_EN) ? 1 : 0, (lawar >> 20) & 0xff);
189 print_size(lawar_size(lawar), ")\n");
Becky Bruceddcebcb2008-01-23 16:31:05 -0600190 }
191
192 return;
193}
194
Kumar Galaf784e322008-08-26 15:01:28 -0500195/* use up to 2 LAWs for DDR, used the last available LAWs */
196int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
197{
198 u64 start_align, law_sz;
199 int law_sz_enc;
200
201 if (start == 0)
202 start_align = 1ull << (LAW_SIZE_32G + 1);
203 else
204 start_align = 1ull << (ffs64(start) - 1);
205 law_sz = min(start_align, sz);
206 law_sz_enc = __ilog2_u64(law_sz) - 1;
207
208 if (set_last_law(start, law_sz_enc, id) < 0)
209 return -1;
210
Kumar Galae6a67892009-04-04 10:21:02 -0500211 /* recalculate size based on what was actually covered by the law */
212 law_sz = 1ull << __ilog2_u64(law_sz);
213
Kumar Galaf784e322008-08-26 15:01:28 -0500214 /* do we still have anything to map */
215 sz = sz - law_sz;
216 if (sz) {
217 start += law_sz;
218
219 start_align = 1ull << (ffs64(start) - 1);
220 law_sz = min(start_align, sz);
221 law_sz_enc = __ilog2_u64(law_sz) - 1;
222
223 if (set_last_law(start, law_sz_enc, id) < 0)
224 return -1;
225 } else {
226 return 0;
227 }
228
229 /* do we still have anything to map */
230 sz = sz - law_sz;
231 if (sz)
232 return 1;
233
234 return 0;
235}
Mingkai Hu7da53352009-09-11 14:19:10 +0800236#endif
Kumar Galaf784e322008-08-26 15:01:28 -0500237
Kumar Gala83d40df2008-01-16 01:13:58 -0600238void init_laws(void)
239{
240 int i;
Kumar Galaf0600542008-06-11 00:44:10 -0500241
Kumar Gala418ec852009-03-19 02:32:23 -0500242#if FSL_HW_NUM_LAWS < 32
Kumar Galaf0600542008-06-11 00:44:10 -0500243 gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
Kumar Gala418ec852009-03-19 02:32:23 -0500244#elif FSL_HW_NUM_LAWS == 32
245 gd->used_laws = 0;
246#else
247#error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
248#endif
Kumar Gala83d40df2008-01-16 01:13:58 -0600249
Wolfgang Denkcd6881b2011-05-19 22:21:41 +0200250 /*
Kumar Gala76396752011-02-03 09:02:13 -0600251 * Any LAWs that were set up before we booted assume they are meant to
252 * be around and mark them used.
253 */
254 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
255 u32 lawar = in_be32(LAWAR_ADDR(i));
Wolfgang Denkcd6881b2011-05-19 22:21:41 +0200256
Kumar Gala76396752011-02-03 09:02:13 -0600257 if (lawar & LAW_EN)
258 gd->used_laws |= (1 << i);
259 }
260
261#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
262 /*
263 * in NAND boot we've already parsed the law_table and setup those LAWs
264 * so don't do it again.
265 */
266 return;
267#endif
268
Kumar Gala83d40df2008-01-16 01:13:58 -0600269 for (i = 0; i < num_law_entries; i++) {
Kumar Galaf0600542008-06-11 00:44:10 -0500270 if (law_table[i].index == -1)
271 set_next_law(law_table[i].addr, law_table[i].size,
272 law_table[i].trgt_id);
273 else
274 set_law(law_table[i].index, law_table[i].addr,
275 law_table[i].size, law_table[i].trgt_id);
Kumar Gala83d40df2008-01-16 01:13:58 -0600276 }
277
Liu Gang461632b2012-08-09 05:10:03 +0000278#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
Liu Gang81fa73b2012-08-09 05:10:00 +0000279 /* check RCW to get which port is used for boot */
280 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
281 u32 bootloc = in_be32(&gur->rcwsr[6]);
Liu Gang461632b2012-08-09 05:10:03 +0000282 /*
283 * in SRIO or PCIE boot we need to set specail LAWs for
284 * SRIO or PCIE interfaces.
285 */
Liu Gang81fa73b2012-08-09 05:10:00 +0000286 switch ((bootloc & FSL_CORENET_RCWSR6_BOOT_LOC) >> 23) {
Liu Gang461632b2012-08-09 05:10:03 +0000287 case 0x0: /* boot from PCIE1 */
288 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS,
289 LAW_SIZE_1M,
290 LAW_TRGT_IF_PCIE_1);
291 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS,
292 LAW_SIZE_1M,
293 LAW_TRGT_IF_PCIE_1);
294 break;
295 case 0x1: /* boot from PCIE2 */
296 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS,
297 LAW_SIZE_1M,
298 LAW_TRGT_IF_PCIE_2);
299 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS,
300 LAW_SIZE_1M,
301 LAW_TRGT_IF_PCIE_2);
302 break;
303 case 0x2: /* boot from PCIE3 */
304 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS,
305 LAW_SIZE_1M,
306 LAW_TRGT_IF_PCIE_3);
307 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS,
308 LAW_SIZE_1M,
309 LAW_TRGT_IF_PCIE_3);
310 break;
Liu Gang81fa73b2012-08-09 05:10:00 +0000311 case 0x8: /* boot from SRIO1 */
Liu Gang461632b2012-08-09 05:10:03 +0000312 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS,
Liu Gang81fa73b2012-08-09 05:10:00 +0000313 LAW_SIZE_1M,
314 LAW_TRGT_IF_RIO_1);
Liu Gang461632b2012-08-09 05:10:03 +0000315 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS,
Liu Gang81fa73b2012-08-09 05:10:00 +0000316 LAW_SIZE_1M,
317 LAW_TRGT_IF_RIO_1);
318 break;
319 case 0x9: /* boot from SRIO2 */
Liu Gang461632b2012-08-09 05:10:03 +0000320 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS,
Liu Gang81fa73b2012-08-09 05:10:00 +0000321 LAW_SIZE_1M,
322 LAW_TRGT_IF_RIO_2);
Liu Gang461632b2012-08-09 05:10:03 +0000323 set_next_law(CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS,
Liu Gang81fa73b2012-08-09 05:10:00 +0000324 LAW_SIZE_1M,
325 LAW_TRGT_IF_RIO_2);
326 break;
327 default:
328 break;
329 }
330#endif
331
Kumar Gala83d40df2008-01-16 01:13:58 -0600332 return ;
333}