| Chris Packham | a6477f7 | 2018-06-25 22:34:57 +1200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2010, 2018 |
| 4 | * Allied Telesis <www.alliedtelesis.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| Simon Glass | 691d719 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 8 | #include <init.h> |
| Chris Packham | a6477f7 | 2018-06-25 22:34:57 +1200 | [diff] [blame] | 9 | #include <miiphy.h> |
| Simon Glass | 5e6267a | 2019-12-28 10:44:48 -0700 | [diff] [blame] | 10 | #include <net.h> |
| Chris Packham | a6477f7 | 2018-06-25 22:34:57 +1200 | [diff] [blame] | 11 | #include <netdev.h> |
| 12 | #include <led.h> |
| 13 | #include <linux/io.h> |
| 14 | #include <asm/arch/cpu.h> |
| 15 | #include <asm/arch/soc.h> |
| 16 | #include <asm/arch/mpp.h> |
| 17 | #include <asm/arch/gpio.h> |
| 18 | |
| 19 | #define SBX81LIFXCAT_OE_LOW (~0) |
| 20 | #define SBX81LIFXCAT_OE_HIGH (~BIT(11)) |
| 21 | #define SBX81LIFXCAT_OE_VAL_LOW (0) |
| 22 | #define SBX81LIFXCAT_OE_VAL_HIGH (BIT(11)) |
| 23 | |
| 24 | DECLARE_GLOBAL_DATA_PTR; |
| 25 | |
| 26 | int board_early_init_f(void) |
| 27 | { |
| 28 | /* |
| 29 | * default gpio configuration |
| 30 | * There are maximum 64 gpios controlled through 2 sets of registers |
| 31 | * the below configuration configures mainly initial LED status |
| 32 | */ |
| 33 | mvebu_config_gpio(SBX81LIFXCAT_OE_VAL_LOW, |
| 34 | SBX81LIFXCAT_OE_VAL_HIGH, |
| 35 | SBX81LIFXCAT_OE_LOW, SBX81LIFXCAT_OE_HIGH); |
| 36 | |
| 37 | /* Multi-Purpose Pins Functionality configuration */ |
| 38 | static const u32 kwmpp_config[] = { |
| 39 | MPP0_SPI_SCn, |
| 40 | MPP1_SPI_MOSI, |
| 41 | MPP2_SPI_SCK, |
| 42 | MPP3_SPI_MISO, |
| 43 | MPP4_NF_IO6, |
| 44 | MPP5_NF_IO7, |
| 45 | MPP6_SYSRST_OUTn, |
| 46 | MPP7_GPO, |
| 47 | MPP8_TW_SDA, |
| 48 | MPP9_TW_SCK, |
| 49 | MPP10_UART0_TXD, |
| 50 | MPP11_UART0_RXD, |
| 51 | MPP12_GPO, |
| 52 | MPP13_UART1_TXD, |
| 53 | MPP14_UART1_RXD, |
| 54 | MPP15_GPIO, |
| 55 | MPP16_GPIO, |
| 56 | MPP17_GPIO, |
| 57 | MPP18_NF_IO0, |
| 58 | MPP19_NF_IO1, |
| 59 | MPP20_GE1_0, |
| 60 | MPP21_GE1_1, |
| 61 | MPP22_GE1_2, |
| 62 | MPP23_GE1_3, |
| 63 | MPP24_GE1_4, |
| 64 | MPP25_GE1_5, |
| 65 | MPP26_GE1_6, |
| 66 | MPP27_GE1_7, |
| 67 | MPP28_GE1_8, |
| 68 | MPP29_GE1_9, |
| 69 | MPP30_GE1_10, |
| 70 | MPP31_GE1_11, |
| 71 | MPP32_GE1_12, |
| 72 | MPP33_GE1_13, |
| 73 | MPP34_GPIO, |
| 74 | MPP35_GPIO, |
| 75 | MPP36_GPIO, |
| 76 | MPP37_GPIO, |
| 77 | MPP38_GPIO, |
| 78 | MPP39_GPIO, |
| 79 | MPP40_GPIO, |
| 80 | MPP41_GPIO, |
| 81 | MPP42_GPIO, |
| 82 | MPP43_GPIO, |
| 83 | MPP44_GPIO, |
| 84 | MPP45_GPIO, |
| 85 | MPP46_GPIO, |
| 86 | MPP47_GPIO, |
| 87 | MPP48_GPIO, |
| 88 | MPP49_GPIO, |
| 89 | 0 |
| 90 | }; |
| 91 | |
| 92 | kirkwood_mpp_conf(kwmpp_config, NULL); |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | int board_init(void) |
| 97 | { |
| 98 | /* address of boot parameters */ |
| 99 | gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; |
| 100 | |
| 101 | return 0; |
| 102 | } |
| 103 | |
| 104 | #ifdef CONFIG_RESET_PHY_R |
| 105 | /* automatically defined by kirkwood config.h */ |
| 106 | void reset_phy(void) |
| 107 | { |
| 108 | } |
| 109 | #endif |
| 110 | |
| 111 | #ifdef CONFIG_MV88E61XX_SWITCH |
| 112 | int mv88e61xx_hw_reset(struct phy_device *phydev) |
| 113 | { |
| 114 | phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; |
| 115 | |
| 116 | return 0; |
| 117 | } |
| 118 | #endif |
| 119 | |
| 120 | #ifdef CONFIG_MISC_INIT_R |
| 121 | int misc_init_r(void) |
| 122 | { |
| 123 | struct udevice *dev; |
| 124 | int ret; |
| 125 | |
| 126 | ret = led_get_by_label("status:ledp", &dev); |
| 127 | if (!ret) |
| 128 | led_set_state(dev, LEDST_ON); |
| 129 | |
| 130 | ret = led_get_by_label("status:ledn", &dev); |
| 131 | if (!ret) |
| 132 | led_set_state(dev, LEDST_OFF); |
| 133 | |
| 134 | return 0; |
| 135 | } |
| 136 | #endif |