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Siva Durga Prasad Paladugu0b54a9d2015-06-10 15:50:57 +05301/*
2 * Configuration for Xilinx ZynqMP emulation
3 * platforms. See zynqmp-common.h for ZynqMP
4 * common configs
5 *
6 * (C) Copyright 2014 - 2015 Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
8 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
9 *
10 * Based on Configuration for Versatile Express
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#ifndef __CONFIG_ZYNQMP_EP_H
16#define __CONFIG_ZYNQMP_EP_H
17
Siva Durga Prasad Paladugu0b54a9d2015-06-10 15:50:57 +053018#define CONFIG_ZYNQ_SDHCI0
Michal Simekf3bd7282015-09-29 01:27:13 +020019#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
Siva Durga Prasad Paladuguc061d5b2016-01-05 12:21:05 +053020#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
Siva Durga Prasad Paladugu0b54a9d2015-06-10 15:50:57 +053021#define CONFIG_ZYNQ_I2C0
22#define CONFIG_SYS_I2C_ZYNQ
23#define CONFIG_ZYNQ_EEPROM
Michal Simek6fe6f132015-07-23 13:27:40 +020024#define CONFIG_AHCI
Siva Durga Prasad Paladuguf4dd69c2015-11-16 16:49:23 +053025#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
26 ZYNQMP_USB1_XHCI_BASEADDR}
Siva Durga Prasad Paladugu0b54a9d2015-06-10 15:50:57 +053027
28#include <configs/xilinx_zynqmp.h>
29
30#endif /* __CONFIG_ZYNQMP_EP_H */