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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / d095631d8d26252eb662cdf2f02aa05d9a1406dd / . / arch / arm / dts / am437x-idk-evm.dts
blob: 2c94c874740b224b7861bdcb63a6a1351e064bbe [file] [log] [blame]
Andrew Davisad841292023-04-11 13:24:55 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Lokesh Vutla54a92e12016-05-16 11:11:18 +0530[diff] [blame]2/*
Andrew Davisad841292023-04-11 13:24:55 -0500[diff] [blame]3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutla54a92e12016-05-16 11:11:18 +0530[diff] [blame]4 */
5
6/dts-v1/;
7
8#include "am4372.dtsi"
9#include <dt-bindings/pinctrl/am43xx.h>
10#include <dt-bindings/pwm/pwm.h>
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13
14/ {
15 model = "TI AM437x Industrial Development Kit";
16 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
17
18 chosen {
19 stdout-path = &uart0;
20 tick-timer = &timer2;
21 };
22
23 v24_0d: fixed-regulator-v24_0d {
24 compatible = "regulator-fixed";
25 regulator-name = "V24_0D";
26 regulator-min-microvolt = <24000000>;
27 regulator-max-microvolt = <24000000>;
28 regulator-always-on;
29 regulator-boot-on;
30 };
31
32 v3_3d: fixed-regulator-v3_3d {
33 compatible = "regulator-fixed";
34 regulator-name = "V3_3D";
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
37 regulator-always-on;
38 regulator-boot-on;
39 vin-supply = <&v24_0d>;
40 };
41
42 vdd_corereg: fixed-regulator-vdd_corereg {
43 compatible = "regulator-fixed";
44 regulator-name = "VDD_COREREG";
45 regulator-min-microvolt = <1100000>;
46 regulator-max-microvolt = <1100000>;
47 regulator-always-on;
48 regulator-boot-on;
49 vin-supply = <&v24_0d>;
50 };
51
52 vdd_core: fixed-regulator-vdd_core {
53 compatible = "regulator-fixed";
54 regulator-name = "VDD_CORE";
55 regulator-min-microvolt = <1100000>;
56 regulator-max-microvolt = <1100000>;
57 regulator-always-on;
58 regulator-boot-on;
59 vin-supply = <&vdd_corereg>;
60 };
61
62 v1_8dreg: fixed-regulator-v1_8dreg{
63 compatible = "regulator-fixed";
64 regulator-name = "V1_8DREG";
65 regulator-min-microvolt = <1800000>;
66 regulator-max-microvolt = <1800000>;
67 regulator-always-on;
68 regulator-boot-on;
69 vin-supply = <&v24_0d>;
70 };
71
72 v1_8d: fixed-regulator-v1_8d{
73 compatible = "regulator-fixed";
74 regulator-name = "V1_8D";
75 regulator-min-microvolt = <1800000>;
76 regulator-max-microvolt = <1800000>;
77 regulator-always-on;
78 regulator-boot-on;
79 vin-supply = <&v1_8dreg>;
80 };
81
82 v1_5dreg: fixed-regulator-v1_5dreg{
83 compatible = "regulator-fixed";
84 regulator-name = "V1_5DREG";
85 regulator-min-microvolt = <1500000>;
86 regulator-max-microvolt = <1500000>;
87 regulator-always-on;
88 regulator-boot-on;
89 vin-supply = <&v24_0d>;
90 };
91
92 v1_5d: fixed-regulator-v1_5d{
93 compatible = "regulator-fixed";
94 regulator-name = "V1_5D";
95 regulator-min-microvolt = <1500000>;
96 regulator-max-microvolt = <1500000>;
97 regulator-always-on;
98 regulator-boot-on;
99 vin-supply = <&v1_5dreg>;
100 };
101
102 gpio_keys: gpio_keys {
103 compatible = "gpio-keys";
104 pinctrl-names = "default";
105 pinctrl-0 = <&gpio_keys_pins_default>;
Lokesh Vutla54a92e12016-05-16 11:11:18 +0530[diff] [blame]106
107 switch@0 {
108 label = "power-button";
109 linux,code = <KEY_POWER>;
110 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
111 };
112 };
113
114 /* fixed 32k external oscillator clock */
115 clk_32k_rtc: clk_32k_rtc {
116 #clock-cells = <0>;
117 compatible = "fixed-clock";
118 clock-frequency = <32768>;
119 };
120};
121
122&am43xx_pinmux {
123 gpio_keys_pins_default: gpio_keys_pins_default {
124 pinctrl-single,pins = <
125 AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
126 >;
127 };
128
129 i2c0_pins_default: i2c0_pins_default {
130 pinctrl-single,pins = <
131 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
132 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
133 >;
134 };
135
136 i2c0_pins_sleep: i2c0_pins_sleep {
137 pinctrl-single,pins = <
138 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
139 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
140 >;
141 };
142
143 i2c2_pins_default: i2c2_pins_default {
144 pinctrl-single,pins = <
145 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
146 AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
147 >;
148 };
149
150 i2c2_pins_sleep: i2c2_pins_sleep {
151 pinctrl-single,pins = <
152 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
153 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
154 >;
155 };
156
157 mmc1_pins_default: pinmux_mmc1_pins_default {
158 pinctrl-single,pins = <
159 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
160 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
161 AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
162 AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
163 AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
164 AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
165 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
166 >;
167 };
168
169 mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
170 pinctrl-single,pins = <
171 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
172 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
173 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
174 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
175 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
176 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
177 AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
178 >;
179 };
180
181 ecap0_pins_default: backlight_pins_default {
182 pinctrl-single,pins = <
183 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
184 >;
185 };
186
187 cpsw_default: cpsw_default {
188 pinctrl-single,pins = <
189 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
190 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
191 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
192 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
193 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
194 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
195 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
196 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
197 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
198 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
199 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
200 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
201 >;
202 };
203
204 cpsw_sleep: cpsw_sleep {
205 pinctrl-single,pins = <
206 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
207 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
208 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
209 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
210 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
211 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
212 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
213 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
214 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
215 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
216 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
217 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
218 >;
219 };
220
221 davinci_mdio_default: davinci_mdio_default {
222 pinctrl-single,pins = <
223 /* MDIO */
224 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
225 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
226 >;
227 };
228
229 davinci_mdio_sleep: davinci_mdio_sleep {
230 pinctrl-single,pins = <
231 /* MDIO reset value */
232 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
233 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
234 >;
235 };
236
237 qspi_pins_default: qspi_pins_default {
238 pinctrl-single,pins = <
239 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
240 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
241 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
242 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
243 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
244 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
245 >;
246 };
247
248 qspi_pins_sleep: qspi_pins_sleep{
249 pinctrl-single,pins = <
250 AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
251 AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
252 AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
253 AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
254 AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
255 AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
256 >;
257 };
258};
259
260&i2c0 {
261 status = "okay";
262 pinctrl-names = "default", "sleep";
263 pinctrl-0 = <&i2c0_pins_default>;
264 pinctrl-1 = <&i2c0_pins_sleep>;
265 clock-frequency = <400000>;
266
267 at24@50 {
268 compatible = "at24,24c256";
269 pagesize = <64>;
270 reg = <0x50>;
271 };
272
273 tps: tps62362@60 {
274 compatible = "ti,tps62362";
275 reg = <0x60>;
276 regulator-name = "VDD_MPU";
277 regulator-min-microvolt = <950000>;
278 regulator-max-microvolt = <1330000>;
279 regulator-boot-on;
280 regulator-always-on;
281 ti,vsel0-state-high;
282 ti,vsel1-state-high;
283 vin-supply = <&v3_3d>;
284 };
285};
286
287&i2c2 {
288 status = "okay";
289 pinctrl-names = "default", "sleep";
290 pinctrl-0 = <&i2c2_pins_default>;
291 pinctrl-1 = <&i2c2_pins_sleep>;
292 clock-frequency = <100000>;
293};
294
295&epwmss0 {
296 status = "okay";
297};
298
299&ecap0 {
300 status = "okay";
301 pinctrl-names = "default";
302 pinctrl-0 = <&ecap0_pins_default>;
303};
304
305&gpio0 {
306 status = "okay";
307};
308
309&gpio1 {
310 status = "okay";
311};
312
313&gpio4 {
314 status = "okay";
315};
316
317&gpio5 {
318 status = "okay";
319};
320
321&mmc1 {
322 status = "okay";
323 pinctrl-names = "default", "sleep";
324 pinctrl-0 = <&mmc1_pins_default>;
325 pinctrl-1 = <&mmc1_pins_sleep>;
326 vmmc-supply = <&v3_3d>;
327 bus-width = <4>;
328 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
329};
330
331&qspi {
332 status = "okay";
333 pinctrl-names = "default", "sleep";
334 pinctrl-0 = <&qspi_pins_default>;
335 pinctrl-1 = <&qspi_pins_sleep>;
336
337 spi-max-frequency = <48000000>;
338 m25p80@0 {
Neil Armstrongffd4c7c2019-02-10 10:16:20 +0000[diff] [blame]339 compatible = "mx66l51235l", "jedec,spi-nor";
Lokesh Vutla54a92e12016-05-16 11:11:18 +0530[diff] [blame]340 spi-max-frequency = <48000000>;
341 reg = <0>;
342 spi-cpol;
343 spi-cpha;
344 spi-tx-bus-width = <1>;
345 spi-rx-bus-width = <4>;
346 #address-cells = <1>;
347 #size-cells = <1>;
348
349 /*
350 * MTD partition table. The ROM checks the first 512KiB for a
351 * valid file to boot(XIP).
352 */
353 partition@0 {
354 label = "QSPI.U_BOOT";
355 reg = <0x00000000 0x000080000>;
356 };
357 partition@1 {
358 label = "QSPI.U_BOOT.backup";
359 reg = <0x00080000 0x00080000>;
360 };
361 partition@2 {
362 label = "QSPI.U-BOOT-SPL_OS";
363 reg = <0x00100000 0x00010000>;
364 };
365 partition@3 {
366 label = "QSPI.U_BOOT_ENV";
367 reg = <0x00110000 0x00010000>;
368 };
369 partition@4 {
370 label = "QSPI.U-BOOT-ENV.backup";
371 reg = <0x00120000 0x00010000>;
372 };
373 partition@5 {
374 label = "QSPI.KERNEL";
375 reg = <0x00130000 0x0800000>;
376 };
377 partition@6 {
378 label = "QSPI.FILESYSTEM";
379 reg = <0x00930000 0x36D0000>;
380 };
381 };
382};
383
384&mac {
Grygorii Strashkob1fe4fe2019-08-31 10:30:33 +0300[diff] [blame]385 slaves = <1>;
Lokesh Vutla54a92e12016-05-16 11:11:18 +0530[diff] [blame]386 pinctrl-names = "default", "sleep";
387 pinctrl-0 = <&cpsw_default>;
388 pinctrl-1 = <&cpsw_sleep>;
389 status = "okay";
390};
391
392&davinci_mdio {
393 pinctrl-names = "default", "sleep";
394 pinctrl-0 = <&davinci_mdio_default>;
395 pinctrl-1 = <&davinci_mdio_sleep>;
396 status = "okay";
Grygorii Strashkob1fe4fe2019-08-31 10:30:33 +0300[diff] [blame]397
398 ethphy0: ethernet-phy@0 {
399 reg = <0>;
400 };
Lokesh Vutla54a92e12016-05-16 11:11:18 +0530[diff] [blame]401};
402
403&cpsw_emac0 {
Grygorii Strashkob1fe4fe2019-08-31 10:30:33 +0300[diff] [blame]404 phy-handle = <&ethphy0>;
Lokesh Vutla54a92e12016-05-16 11:11:18 +0530[diff] [blame]405 phy-mode = "rgmii";
406};
407
408&rtc {
409 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
410 clock-names = "ext-clk", "int-clk";
411 status = "okay";
412};
413
414&wdt {
415 status = "okay";
416};
417
418&cpu {
419 cpu0-supply = <&tps>;
420};