| Marcel Ziswiler | 7d1a106 | 2023-08-04 12:08:08 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
| 2 | /* |
| 3 | * Copyright 2023 Toradex |
| 4 | */ |
| 5 | |
| 6 | #include "k3-am625-verdin-wifi-dev-binman.dtsi" |
| 7 | |
| 8 | / { |
| 9 | aliases { |
| 10 | eeprom0 = &eeprom_module; |
| 11 | eeprom1 = &eeprom_carrier_board; |
| 12 | eeprom2 = &eeprom_display_adapter; |
| 13 | }; |
| 14 | |
| 15 | chosen { |
| 16 | tick-timer = &main_timer0; |
| 17 | }; |
| 18 | |
| 19 | memory@80000000 { |
| 20 | bootph-pre-ram; |
| 21 | }; |
| 22 | }; |
| 23 | |
| 24 | &cbass_main { |
| 25 | bootph-pre-ram; |
| 26 | |
| 27 | timer@2400000 { |
| 28 | clock-frequency = <25000000>; |
| 29 | bootph-pre-ram; |
| 30 | }; |
| 31 | }; |
| 32 | |
| 33 | &cbass_mcu { |
| 34 | bootph-pre-ram; |
| 35 | }; |
| 36 | |
| 37 | &cbass_wakeup { |
| 38 | bootph-pre-ram; |
| 39 | }; |
| 40 | |
| 41 | &chipid { |
| 42 | bootph-pre-ram; |
| 43 | }; |
| 44 | |
| 45 | &cpsw3g { |
| 46 | bootph-pre-ram; |
| 47 | }; |
| 48 | |
| 49 | &cpsw3g_phy0 { |
| 50 | bootph-pre-ram; |
| 51 | }; |
| 52 | |
| 53 | &cpsw3g_phy1 { |
| 54 | bootph-pre-ram; |
| 55 | }; |
| 56 | |
| 57 | &cpsw_port1 { |
| 58 | bootph-pre-ram; |
| 59 | }; |
| 60 | |
| 61 | &cpsw_port2 { |
| 62 | bootph-pre-ram; |
| 63 | }; |
| 64 | |
| 65 | /* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */ |
| 66 | &cpsw3g_mdio { |
| 67 | /delete-property/ assigned-clocks; |
| 68 | /delete-property/ assigned-clock-parents; |
| 69 | /delete-property/ assigned-clock-rates; |
| 70 | bootph-pre-ram; |
| 71 | }; |
| 72 | |
| 73 | &dmsc { |
| 74 | bootph-pre-ram; |
| 75 | |
| 76 | k3_sysreset: sysreset-controller { |
| 77 | compatible = "ti,sci-sysreset"; |
| 78 | bootph-pre-ram; |
| 79 | }; |
| 80 | }; |
| 81 | |
| 82 | &dmss { |
| 83 | bootph-pre-ram; |
| 84 | }; |
| 85 | |
| 86 | &fss { |
| 87 | bootph-pre-ram; |
| 88 | }; |
| 89 | |
| 90 | &k3_clks { |
| 91 | bootph-pre-ram; |
| 92 | }; |
| 93 | |
| 94 | &k3_pds { |
| 95 | bootph-pre-ram; |
| 96 | }; |
| 97 | |
| 98 | &k3_reset { |
| 99 | bootph-pre-ram; |
| 100 | }; |
| 101 | |
| 102 | &main_gpio0 { |
| 103 | bootph-pre-ram; |
| 104 | }; |
| 105 | |
| 106 | /* On-module I2C - PMIC_I2C */ |
| 107 | &main_i2c0 { |
| 108 | eeprom_module: eeprom@50 { |
| 109 | compatible = "i2c-eeprom"; |
| 110 | pagesize = <16>; |
| 111 | reg = <0x50>; |
| 112 | }; |
| 113 | }; |
| 114 | |
| 115 | /* Verdin I2C_1 */ |
| 116 | &main_i2c1 { |
| 117 | /* EEPROM on display adapter (MIPI DSI Display Adapter) */ |
| 118 | eeprom_display_adapter: eeprom@50 { |
| 119 | compatible = "i2c-eeprom"; |
| 120 | reg = <0x50>; |
| 121 | pagesize = <16>; |
| 122 | }; |
| 123 | |
| 124 | /* EEPROM on carrier board */ |
| 125 | eeprom_carrier_board: eeprom@57 { |
| 126 | compatible = "i2c-eeprom"; |
| 127 | reg = <0x57>; |
| 128 | pagesize = <16>; |
| 129 | }; |
| 130 | }; |
| 131 | |
| 132 | &main_pmx0 { |
| 133 | bootph-pre-ram; |
| 134 | }; |
| 135 | |
| 136 | /* Verdin UART_3, used as the Linux console */ |
| 137 | &main_uart0 { |
| 138 | bootph-pre-ram; |
| 139 | }; |
| 140 | |
| 141 | /* Verdin UART_1 */ |
| 142 | &main_uart1 { |
| 143 | bootph-pre-ram; |
| 144 | }; |
| 145 | |
| 146 | &mcu_pmx0 { |
| 147 | bootph-pre-ram; |
| 148 | }; |
| 149 | |
| 150 | &pinctrl_ctrl_sleep_moci { |
| 151 | bootph-pre-ram; |
| 152 | }; |
| 153 | |
| 154 | &pinctrl_i2c0 { |
| 155 | bootph-pre-ram; |
| 156 | }; |
| 157 | |
| 158 | &pinctrl_i2c1 { |
| 159 | bootph-pre-ram; |
| 160 | }; |
| 161 | |
| 162 | &pinctrl_sdhci0 { |
| 163 | bootph-pre-ram; |
| 164 | }; |
| 165 | |
| 166 | &pinctrl_uart0 { |
| 167 | bootph-pre-ram; |
| 168 | }; |
| 169 | |
| 170 | &pinctrl_uart1 { |
| 171 | bootph-pre-ram; |
| 172 | }; |
| 173 | |
| 174 | &pinctrl_wkup_uart0 { |
| 175 | bootph-pre-ram; |
| 176 | }; |
| 177 | |
| 178 | &sdhci0 { |
| 179 | bootph-pre-ram; |
| 180 | }; |
| 181 | |
| 182 | &sdhci2 { |
| 183 | status = "disabled"; |
| 184 | }; |
| 185 | |
| 186 | &secure_proxy_main { |
| 187 | bootph-pre-ram; |
| 188 | }; |
| 189 | |
| 190 | &verdin_ctrl_sleep_moci { |
| 191 | bootph-pre-ram; |
| 192 | }; |
| 193 | |
| 194 | &wkup_conf { |
| 195 | bootph-pre-ram; |
| 196 | }; |
| 197 | |
| 198 | /* Verdin UART_2 */ |
| 199 | &wkup_uart0 { |
| 200 | bootph-pre-ram; |
| 201 | }; |