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Takeshi Kihara031fa182018-04-11 18:37:42 +09001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the ebisu board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r8a77990.dtsi"
Marek Vasut0bb5d242018-05-31 18:30:17 +020010#include <dt-bindings/gpio/gpio.h>
Takeshi Kihara031fa182018-04-11 18:37:42 +090011
12/ {
13 model = "Renesas Ebisu board based on r8a77990";
14 compatible = "renesas,ebisu", "renesas,r8a77990";
15
16 aliases {
17 serial0 = &scif2;
Marek Vasut0bb5d242018-05-31 18:30:17 +020018 ethernet0 = &avb;
Takeshi Kihara031fa182018-04-11 18:37:42 +090019 };
20
21 chosen {
22 bootargs = "ignore_loglevel";
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory@48000000 {
27 device_type = "memory";
28 /* first 128MB is reserved for secure area. */
29 reg = <0x0 0x48000000 0x0 0x38000000>;
30 };
Marek Vasut2c84d522018-06-18 06:03:57 +020031
32 reg_1p8v: regulator0 {
33 compatible = "regulator-fixed";
34 regulator-name = "fixed-1.8V";
35 regulator-min-microvolt = <1800000>;
36 regulator-max-microvolt = <1800000>;
37 regulator-boot-on;
38 regulator-always-on;
39 };
40
41 reg_3p3v: regulator1 {
42 compatible = "regulator-fixed";
43 regulator-name = "fixed-3.3V";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
46 regulator-boot-on;
47 regulator-always-on;
48 };
Takeshi Kihara031fa182018-04-11 18:37:42 +090049};
50
Marek Vasut0bb5d242018-05-31 18:30:17 +020051&avb {
52 pinctrl-0 = <&avb_pins>;
53 pinctrl-names = "default";
54 renesas,no-ether-link;
55 phy-handle = <&phy0>;
56 phy-mode = "rgmii-txid";
57 status = "okay";
58
59 phy0: ethernet-phy@0 {
60 rxc-skew-ps = <1500>;
61 reg = <0>;
62 interrupt-parent = <&gpio2>;
63 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
64 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
65 };
66};
67
Hiroyuki Yokoyama2a1eade2018-09-27 19:05:18 +090068&ehci0 {
69 status = "okay";
70};
71
Takeshi Kihara031fa182018-04-11 18:37:42 +090072&extal_clk {
73 clock-frequency = <48000000>;
74};
75
Marek Vasut0bb5d242018-05-31 18:30:17 +020076&pfc {
Marek Vasut65dcc802018-06-13 21:44:50 +020077 pinctrl-0 = <&scif_clk_pins>;
78 pinctrl-names = "default";
79
Marek Vasut0bb5d242018-05-31 18:30:17 +020080 avb_pins: avb {
81 mux {
82 groups = "avb_link", "avb_mii";
83 function = "avb";
84 };
85 };
Marek Vasut65dcc802018-06-13 21:44:50 +020086
87 scif2_pins: scif2 {
88 groups = "scif2_data_a";
89 function = "scif2";
90 };
91
92 scif_clk_pins: scif_clk {
93 groups = "scif_clk_a";
94 function = "scif_clk";
95 };
Marek Vasut2c84d522018-06-18 06:03:57 +020096
97 sdhi3_pins: sd2 {
98 groups = "sdhi3_data8", "sdhi3_ctrl";
99 function = "sdhi3";
100 power-source = <1800>;
101 };
102
103 sdhi3_pins_uhs: sd2_uhs {
104 groups = "sdhi3_data8", "sdhi3_ctrl";
105 function = "sdhi3";
106 power-source = <1800>;
107 };
Hiroyuki Yokoyama2a1eade2018-09-27 19:05:18 +0900108
109 usb0_pins: usb0 {
110 groups = "usb0";
111 function = "usb0";
112 };
113};
114
115&usb2_phy0 {
116 pinctrl-0 = <&usb0_pins>;
117 pinctrl-name = "default";
118
119 status = "okay";
Marek Vasut0bb5d242018-05-31 18:30:17 +0200120};
121
Marek Vasutbc19d282018-05-31 19:56:42 +0200122&sdhi0 {
123 status = "okay";
124};
125
126&sdhi1 {
127 status = "okay";
128};
129
130&sdhi3 {
Marek Vasut2c84d522018-06-18 06:03:57 +0200131 /* used for on-board 8bit eMMC */
132 pinctrl-0 = <&sdhi3_pins>;
133 pinctrl-1 = <&sdhi3_pins_uhs>;
134 pinctrl-names = "default", "state_uhs";
135
136 vmmc-supply = <&reg_3p3v>;
137 vqmmc-supply = <&reg_1p8v>;
Marek Vasutbc19d282018-05-31 19:56:42 +0200138 bus-width = <8>;
Marek Vasut2c84d522018-06-18 06:03:57 +0200139 mmc-hs200-1_8v;
Marek Vasutbc19d282018-05-31 19:56:42 +0200140 non-removable;
141 status = "okay";
142};
143
Takeshi Kihara031fa182018-04-11 18:37:42 +0900144&scif2 {
Marek Vasut65dcc802018-06-13 21:44:50 +0200145 pinctrl-0 = <&scif2_pins>;
146 pinctrl-names = "default";
147
Takeshi Kihara031fa182018-04-11 18:37:42 +0900148 status = "okay";
149};