blob: dd500caf6c557bbb8eda6109b885b52e268b28d1 [file] [log] [blame]
Stelian Pop8e429b32008-05-08 18:52:23 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9263EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Pop56a24792008-05-08 14:52:31 +020031#define AT91_CPU_NAME "AT91SAM9263"
Stelian Popad229a42008-11-07 13:55:14 +010032#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
33#define AT91_MASTER_CLOCK 100000000 /* peripheral */
34#define AT91_CPU_CLOCK 200000000 /* cpu */
Jean-Christophe PLAGNIOL-VILLARD3aed3aa2008-12-14 10:29:39 +010035#define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */
Stelian Popad229a42008-11-07 13:55:14 +010036#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
Stelian Pop8e429b32008-05-08 18:52:23 +020037
38#define AT91_SLOW_CLOCK 32768 /* slow clock */
39
40#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
41#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/
42#define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */
43#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
44
45#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS 1
47#define CONFIG_INITRD_TAG 1
48
49#define CONFIG_SKIP_LOWLEVEL_INIT
50#define CONFIG_SKIP_RELOCATE_UBOOT
51
52/*
53 * Hardware drivers
54 */
55#define CONFIG_ATMEL_USART 1
56#undef CONFIG_USART0
57#undef CONFIG_USART1
58#undef CONFIG_USART2
59#define CONFIG_USART3 1 /* USART 3 is DBGU */
60
Stelian Pop56a24792008-05-08 14:52:31 +020061/* LCD */
62#define CONFIG_LCD 1
63#define LCD_BPP LCD_COLOR8
64#define CONFIG_LCD_LOGO 1
65#undef LCD_TEST_PATTERN
66#define CONFIG_LCD_INFO 1
67#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Pop56a24792008-05-08 14:52:31 +020069#define CONFIG_ATMEL_LCD 1
70#define CONFIG_ATMEL_LCD_BGR555 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Pop56a24792008-05-08 14:52:31 +020072
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010073/* LED */
74#define CONFIG_AT91_LED
75#define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */
76#define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */
77#define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */
78
Stelian Pop8e429b32008-05-08 18:52:23 +020079#define CONFIG_BOOTDELAY 3
80
Stelian Pop8e429b32008-05-08 18:52:23 +020081/*
82 * BOOTP options
83 */
84#define CONFIG_BOOTP_BOOTFILESIZE 1
85#define CONFIG_BOOTP_BOOTPATH 1
86#define CONFIG_BOOTP_GATEWAY 1
87#define CONFIG_BOOTP_HOSTNAME 1
88
89/*
90 * Command line configuration.
91 */
92#include <config_cmd_default.h>
93#undef CONFIG_CMD_BDI
94#undef CONFIG_CMD_IMI
95#undef CONFIG_CMD_AUTOSCRIPT
96#undef CONFIG_CMD_FPGA
97#undef CONFIG_CMD_LOADS
98#undef CONFIG_CMD_IMLS
99
100#define CONFIG_CMD_PING 1
101#define CONFIG_CMD_DHCP 1
102#define CONFIG_CMD_NAND 1
103#define CONFIG_CMD_USB 1
104
105/* SDRAM */
106#define CONFIG_NR_DRAM_BANKS 1
107#define PHYS_SDRAM 0x20000000
108#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
109
110/* DataFlash */
111#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200112#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
113#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
114#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Stelian Pop8e429b32008-05-08 18:52:23 +0200115#define AT91_SPI_CLK 15000000
116#define DATAFLASH_TCSS (0x1a << 16)
117#define DATAFLASH_TCHS (0x1 << 24)
118
119/* NOR flash, if populated */
120#if 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#define CONFIG_SYS_NO_FLASH 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200122#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200124#define CONFIG_FLASH_CFI_DRIVER 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200125#define PHYS_FLASH_1 0x10000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
127#define CONFIG_SYS_MAX_FLASH_SECT 256
128#define CONFIG_SYS_MAX_FLASH_BANKS 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200129#endif
130
131/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100132#ifdef CONFIG_CMD_NAND
133#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_MAX_NAND_DEVICE 1
135#define CONFIG_SYS_NAND_BASE 0x40000000
136#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100137/* our ALE is AD21 */
138#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
139/* our CLE is AD22 */
140#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
141#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
142#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
143#endif
Stelian Pop8e429b32008-05-08 18:52:23 +0200144
145/* Ethernet */
146#define CONFIG_MACB 1
147#define CONFIG_RMII 1
148#define CONFIG_NET_MULTI 1
149#define CONFIG_NET_RETRY_COUNT 20
150#define CONFIG_RESET_PHY_R 1
151
152/* USB */
153#define CONFIG_USB_OHCI_NEW 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200154#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
156#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */
157#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
158#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Pop8e429b32008-05-08 18:52:23 +0200159#define CONFIG_USB_STORAGE 1
Stelian Pop3e0cda02008-11-09 00:14:46 +0100160#define CONFIG_CMD_FAT 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop8e429b32008-05-08 18:52:23 +0200163
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
165#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop8e429b32008-05-08 18:52:23 +0200166
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop8e429b32008-05-08 18:52:23 +0200168
169/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200170#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200172#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200174#define CONFIG_ENV_SIZE 0x4200
Stelian Pop8e429b32008-05-08 18:52:23 +0200175#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
176#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
177 "root=/dev/mtdblock0 " \
178 "mtdparts=at91_nand:-(root) "\
179 "rw rootfstype=jffs2"
180
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Pop8e429b32008-05-08 18:52:23 +0200182
183/* bootstrap + u-boot + env + linux in nandflash */
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200184#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200185#define CONFIG_ENV_OFFSET 0x60000
186#define CONFIG_ENV_OFFSET_REDUND 0x80000
187#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Pop8e429b32008-05-08 18:52:23 +0200188#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
189#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
190 "root=/dev/mtdblock5 " \
191 "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
192 "rw rootfstype=jffs2"
193
194#endif
195
196#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Pop8e429b32008-05-08 18:52:23 +0200198
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_PROMPT "U-Boot> "
200#define CONFIG_SYS_CBSIZE 256
201#define CONFIG_SYS_MAXARGS 16
202#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
203#define CONFIG_SYS_LONGHELP 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200204#define CONFIG_CMDLINE_EDITING 1
205
206#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
207/*
208 * Size of malloc() pool
209 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
211#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Pop8e429b32008-05-08 18:52:23 +0200212
213#define CONFIG_STACKSIZE (32*1024) /* regular stack */
214
215#ifdef CONFIG_USE_IRQ
216#error CONFIG_USE_IRQ not supported
217#endif
218
219#endif