blob: 22bbac51aa33c6bd69900a074e98503754833a42 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -05002/*
Kumar Gala7a577fd2011-01-12 02:48:53 -06003 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -05004 */
5
Masahiro Yamada6f2ed0e2014-04-28 10:17:10 +09006#include "config.h"
Kumar Gala7a577fd2011-01-12 02:48:53 -06007
8#ifdef CONFIG_RESET_VECTOR_ADDRESS
9#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
10#else
Kumar Gala6c97a202009-09-09 11:40:41 -050011#define RESET_VECTOR_ADDRESS 0xfffffffc
12#endif
13
Prabhakar Kushwaha0938b602014-03-31 15:31:34 +053014#ifndef CONFIG_SYS_MONITOR_LEN
15#define CONFIG_SYS_MONITOR_LEN 0x80000
16#endif
17
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050018OUTPUT_ARCH(powerpc)
Alexander Graffd96ea42014-04-11 17:09:44 +020019ENTRY(_start_e500)
Peter Tyserfbe53f52010-09-29 14:05:56 -050020
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050021PHDRS
22{
23 text PT_LOAD;
24 bss PT_LOAD;
25}
26
27SECTIONS
28{
29 /* Read-only sections, merged into text segment: */
30 . = + SIZEOF_HEADERS;
31 .interp : { *(.interp) }
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050032 .text :
33 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050034 *(.text*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050035 } :text
36 _etext = .;
37 PROVIDE (etext = .);
38 .rodata :
39 {
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050040 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
41 } :text
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050042
43 /* Read-write section, merged into data segment: */
44 . = (. + 0x00FF) & 0xFFFFFF00;
45 _erotext = .;
46 PROVIDE (erotext = .);
47 .reloc :
48 {
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050049 _GOT2_TABLE_ = .;
Peter Tyserfbe53f52010-09-29 14:05:56 -050050 KEEP(*(.got2))
Joakim Tjernlund337f5f52010-12-03 17:30:37 +010051 KEEP(*(.got))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050052 _FIXUP_TABLE_ = .;
Peter Tyserfbe53f52010-09-29 14:05:56 -050053 KEEP(*(.fixup))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050054 }
Joakim Tjernlund337f5f52010-12-03 17:30:37 +010055 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050056 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
57
58 .data :
59 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050060 *(.data*)
61 *(.sdata*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050062 }
63 _edata = .;
64 PROVIDE (edata = .);
65
66 . = .;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050067
Marek Vasut55675142012-10-12 10:27:03 +000068 . = ALIGN(4);
69 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +000070 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +000071 }
72
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050073 . = .;
74 __start___ex_table = .;
75 __ex_table : { *(__ex_table) }
76 __stop___ex_table = .;
77
78 . = ALIGN(256);
79 __init_begin = .;
80 .text.init : { *(.text.init) }
81 .data.init : { *(.data.init) }
82 . = ALIGN(256);
83 __init_end = .;
Jagdish Gediya4d3294b2018-09-03 21:35:05 +053084 _end = .;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050085
Ying Zhang5df572f2013-05-20 14:07:23 +080086#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
87 .bootpg ADDR(.text) - 0x1000 :
88 {
89 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
90 } :text = 0xffff
Prabhakar Kushwaha0938b602014-03-31 15:31:34 +053091 . = ADDR(.text) + CONFIG_SYS_MONITOR_LEN;
Ying Zhang5df572f2013-05-20 14:07:23 +080092#else
Kumar Gala6c97a202009-09-09 11:40:41 -050093 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050094 {
Stefan Roesea47a12b2010-04-15 16:07:28 +020095 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050096 } :text = 0xffff
97
Kumar Gala6c97a202009-09-09 11:40:41 -050098 .resetvec RESET_VECTOR_ADDRESS :
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050099 {
Peter Tyserfbe53f52010-09-29 14:05:56 -0500100 KEEP(*(.resetvec))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500101 } :text = 0xffff
102
Kumar Gala6c97a202009-09-09 11:40:41 -0500103 . = RESET_VECTOR_ADDRESS + 0x4;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500104
Peter Tyser3beb40c2009-10-07 11:45:00 -0500105 /*
106 * Make sure that the bss segment isn't linked at 0x0, otherwise its
107 * address won't be updated during relocation fixups. Note that
108 * this is a temporary fix. Code to dynamically the fixup the bss
109 * location will be added in the future. When the bss relocation
110 * fixup code is present this workaround should be removed.
111 */
112#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
113 . |= 0x10;
114#endif
Ying Zhang5df572f2013-05-20 14:07:23 +0800115#endif
Peter Tyser3beb40c2009-10-07 11:45:00 -0500116
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500117 __bss_start = .;
118 .bss (NOLOAD) :
119 {
Peter Tyserfbe53f52010-09-29 14:05:56 -0500120 *(.sbss*)
121 *(.bss*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500122 *(COMMON)
123 } :bss
124
125 . = ALIGN(4);
Simon Glass3929fb02013-03-14 06:54:53 +0000126 __bss_end = . ;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500127 PROVIDE (end = .);
128}