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Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +05301/*
2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * Based on da830evm.c. Original Copyrights follow:
5 *
6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <common.h>
25#include <i2c.h>
Ben Gardiner3d248d32010-10-14 17:26:29 -040026#include <net.h>
27#include <netdev.h>
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +053028#include <asm/arch/hardware.h>
Ben Gardinera3f88292010-10-14 17:26:22 -040029#include <asm/arch/emif_defs.h>
Ben Gardiner3d248d32010-10-14 17:26:29 -040030#include <asm/arch/emac_defs.h>
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +053031#include <asm/io.h>
32#include "../common/misc.h"
33#include "common.h"
34
35DECLARE_GLOBAL_DATA_PTR;
36
Prakash PM37adbf92010-07-15 16:08:38 -040037#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +053038
39/* SPI0 pin muxer settings */
40static const struct pinmux_config spi1_pins[] = {
Prakash PM37adbf92010-07-15 16:08:38 -040041 { pinmux(5), 1, 1 },
42 { pinmux(5), 1, 2 },
43 { pinmux(5), 1, 4 },
44 { pinmux(5), 1, 5 }
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +053045};
46
47/* UART pin muxer settings */
48static const struct pinmux_config uart_pins[] = {
Prakash PM37adbf92010-07-15 16:08:38 -040049 { pinmux(0), 4, 6 },
50 { pinmux(0), 4, 7 },
51 { pinmux(4), 2, 4 },
52 { pinmux(4), 2, 5 }
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +053053};
54
Ben Gardiner3d248d32010-10-14 17:26:29 -040055#ifdef CONFIG_DRIVER_TI_EMAC
56static const struct pinmux_config emac_pins[] = {
57 { pinmux(2), 8, 1 },
58 { pinmux(2), 8, 2 },
59 { pinmux(2), 8, 3 },
60 { pinmux(2), 8, 4 },
61 { pinmux(2), 8, 5 },
62 { pinmux(2), 8, 6 },
63 { pinmux(2), 8, 7 },
64 { pinmux(3), 8, 0 },
65 { pinmux(3), 8, 1 },
66 { pinmux(3), 8, 2 },
67 { pinmux(3), 8, 3 },
68 { pinmux(3), 8, 4 },
69 { pinmux(3), 8, 5 },
70 { pinmux(3), 8, 6 },
71 { pinmux(3), 8, 7 },
72 { pinmux(4), 8, 0 },
73 { pinmux(4), 8, 1 }
74};
75#endif /* CONFIG_DRIVER_TI_EMAC */
76
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +053077/* I2C pin muxer settings */
78static const struct pinmux_config i2c_pins[] = {
Prakash PM37adbf92010-07-15 16:08:38 -040079 { pinmux(4), 2, 2 },
80 { pinmux(4), 2, 3 }
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +053081};
82
Ben Gardiner756d1fe2010-10-14 17:26:19 -040083#ifdef CONFIG_NAND_DAVINCI
84const struct pinmux_config nand_pins[] = {
85 { pinmux(7), 1, 1 },
86 { pinmux(7), 1, 2 },
87 { pinmux(7), 1, 4 },
88 { pinmux(7), 1, 5 },
89 { pinmux(9), 1, 0 },
90 { pinmux(9), 1, 1 },
91 { pinmux(9), 1, 2 },
92 { pinmux(9), 1, 3 },
93 { pinmux(9), 1, 4 },
94 { pinmux(9), 1, 5 },
95 { pinmux(9), 1, 6 },
96 { pinmux(9), 1, 7 },
97 { pinmux(12), 1, 5 },
98 { pinmux(12), 1, 6 }
99};
100#endif
101
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +0530102static const struct pinmux_resource pinmuxes[] = {
103#ifdef CONFIG_SPI_FLASH
104 PINMUX_ITEM(spi1_pins),
105#endif
106 PINMUX_ITEM(uart_pins),
107 PINMUX_ITEM(i2c_pins),
Ben Gardiner756d1fe2010-10-14 17:26:19 -0400108#ifdef CONFIG_NAND_DAVINCI
109 PINMUX_ITEM(nand_pins),
110#endif
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +0530111};
112
113static const struct lpsc_resource lpsc[] = {
114 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
115 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */
116 { DAVINCI_LPSC_EMAC }, /* image download */
117 { DAVINCI_LPSC_UART2 }, /* console */
118 { DAVINCI_LPSC_GPIO },
119};
120
Sekhar Nori4f6fc152010-11-19 11:39:48 -0500121#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK
122#define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000
123#endif
124
125/*
126 * get_board_rev() - setup to pass kernel board revision information
127 * Returns:
128 * bit[0-3] Maximum cpu clock rate supported by onboard SoC
129 * 0000b - 300 MHz
130 * 0001b - 372 MHz
131 * 0010b - 408 MHz
132 * 0011b - 456 MHz
133 */
134u32 get_board_rev(void)
135{
136 char *s;
137 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
138 u32 rev = 0;
139
140 s = getenv("maxcpuclk");
141 if (s)
142 maxcpuclk = simple_strtoul(s, NULL, 10);
143
144 if (maxcpuclk >= 456000000)
145 rev = 3;
146 else if (maxcpuclk >= 408000000)
147 rev = 2;
148 else if (maxcpuclk >= 372000000)
149 rev = 1;
150
151 return rev;
152}
153
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +0530154int board_init(void)
155{
156#ifndef CONFIG_USE_IRQ
157 irq_init();
158#endif
159
Ben Gardinera3f88292010-10-14 17:26:22 -0400160
161#ifdef CONFIG_NAND_DAVINCI
162 /*
163 * NAND CS setup - cycle counts based on da850evm NAND timings in the
164 * Linux kernel @ 25MHz EMIFA
165 */
166 writel((DAVINCI_ABCR_WSETUP(0) |
167 DAVINCI_ABCR_WSTROBE(0) |
168 DAVINCI_ABCR_WHOLD(0) |
169 DAVINCI_ABCR_RSETUP(0) |
170 DAVINCI_ABCR_RSTROBE(1) |
171 DAVINCI_ABCR_RHOLD(0) |
172 DAVINCI_ABCR_TA(0) |
173 DAVINCI_ABCR_ASIZE_8BIT),
174 &davinci_emif_regs->ab2cr); /* CS3 */
175#endif
176
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +0530177 /* arch number of the board */
178 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
179
180 /* address of boot parameters */
181 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
182
183 /*
184 * Power on required peripherals
185 * ARM does not have access by default to PSC0 and PSC1
186 * assuming here that the DSP bootloader has set the IOPU
187 * such that PSC access is available to ARM
188 */
189 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
190 return 1;
191
192 /* setup the SUSPSRC for ARM to control emulation suspend */
193 writel(readl(&davinci_syscfg_regs->suspsrc) &
194 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
195 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
196 DAVINCI_SYSCFG_SUSPSRC_UART2),
197 &davinci_syscfg_regs->suspsrc);
198
199 /* configure pinmux settings */
200 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
201 return 1;
202
Ben Gardiner3d248d32010-10-14 17:26:29 -0400203#ifdef CONFIG_DRIVER_TI_EMAC
204 if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
205 return 1;
206 /* set cfgchip3 to select MII */
207 writel(readl(&davinci_syscfg_regs->cfgchip3) & ~(1 << 8),
208 &davinci_syscfg_regs->cfgchip3);
209#endif /* CONFIG_DRIVER_TI_EMAC */
210
Sudhakar Rajashekhara89b765c2010-06-10 15:18:15 +0530211 /* enable the console UART */
212 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
213 DAVINCI_UART_PWREMU_MGMT_UTRST),
214 &davinci_uart2_ctrl_regs->pwremu_mgmt);
215
216 return 0;
217}
Ben Gardiner3d248d32010-10-14 17:26:29 -0400218
219#ifdef CONFIG_DRIVER_TI_EMAC
220
221/*
222 * Initializes on-board ethernet controllers.
223 */
224int board_eth_init(bd_t *bis)
225{
226 if (!davinci_emac_initialize()) {
227 printf("Error: Ethernet init failed!\n");
228 return -1;
229 }
230
231 return 0;
232}
233#endif /* CONFIG_DRIVER_TI_EMAC */