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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Markus Klotzbuecher0be62722007-01-09 14:57:12 +01002/*
3 * (C) Copyright 2006
4 * Markus Klotzbuecher, mk@denx.de
Chuanhua Han55f2bc72019-06-21 16:21:53 +08005 *
6 * (C) Copyright 2019 NXP
7 * Chuanhua Han <chuanhua.han@nxp.com>
Markus Klotzbuecher0be62722007-01-09 14:57:12 +01008 */
9
10/*
11 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
12 * Extremly Accurate DS3231 Real Time Clock (RTC).
13 *
14 * copied from ds1337.c
15 */
16
17#include <common.h>
18#include <command.h>
Chuanhua Han55f2bc72019-06-21 16:21:53 +080019#include <dm.h>
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010020#include <rtc.h>
21#include <i2c.h>
22
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010023/*
24 * RTC register addresses
25 */
26#define RTC_SEC_REG_ADDR 0x0
27#define RTC_MIN_REG_ADDR 0x1
28#define RTC_HR_REG_ADDR 0x2
29#define RTC_DAY_REG_ADDR 0x3
30#define RTC_DATE_REG_ADDR 0x4
31#define RTC_MON_REG_ADDR 0x5
32#define RTC_YR_REG_ADDR 0x6
33#define RTC_CTL_REG_ADDR 0x0e
34#define RTC_STAT_REG_ADDR 0x0f
35
36
37/*
38 * RTC control register bits
39 */
40#define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
41#define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
42#define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
43#define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
44#define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
45#define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
46
47/*
48 * RTC status register bits
49 */
50#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
51#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
52#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
Priyanka Jainc3409412015-06-29 15:39:23 +053053#define RTC_STAT_BIT_BB32KHZ 0x40 /* Battery backed 32KHz Output */
54#define RTC_STAT_BIT_EN32KHZ 0x8 /* Enable 32KHz Output */
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010055
56
Chuanhua Han55f2bc72019-06-21 16:21:53 +080057#if !CONFIG_IS_ENABLED(DM_RTC)
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010058static uchar rtc_read (uchar reg);
59static void rtc_write (uchar reg, uchar val);
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010060
61
62/*
63 * Get the current time from the RTC
64 */
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +030065int rtc_get (struct rtc_time *tmp)
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010066{
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +030067 int rel = 0;
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010068 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
69
70 control = rtc_read (RTC_CTL_REG_ADDR);
71 status = rtc_read (RTC_STAT_REG_ADDR);
72 sec = rtc_read (RTC_SEC_REG_ADDR);
73 min = rtc_read (RTC_MIN_REG_ADDR);
74 hour = rtc_read (RTC_HR_REG_ADDR);
75 wday = rtc_read (RTC_DAY_REG_ADDR);
76 mday = rtc_read (RTC_DATE_REG_ADDR);
77 mon_cent = rtc_read (RTC_MON_REG_ADDR);
78 year = rtc_read (RTC_YR_REG_ADDR);
79
Wolfgang Denk397b40c2011-11-04 15:55:12 +000080 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010081 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
82 year, mon_cent, mday, wday, hour, min, sec, control, status);
83
84 if (status & RTC_STAT_BIT_OSF) {
85 printf ("### Warning: RTC oscillator has stopped\n");
86 /* clear the OSF flag */
87 rtc_write (RTC_STAT_REG_ADDR,
88 rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +030089 rel = -1;
Markus Klotzbuecher0be62722007-01-09 14:57:12 +010090 }
91
92 tmp->tm_sec = bcd2bin (sec & 0x7F);
93 tmp->tm_min = bcd2bin (min & 0x7F);
94 tmp->tm_hour = bcd2bin (hour & 0x3F);
95 tmp->tm_mday = bcd2bin (mday & 0x3F);
96 tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
97 tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
98 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
99 tmp->tm_yday = 0;
100 tmp->tm_isdst= 0;
101
Wolfgang Denk397b40c2011-11-04 15:55:12 +0000102 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100103 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
104 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300105
106 return rel;
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100107}
108
109
110/*
111 * Set the RTC
112 */
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200113int rtc_set (struct rtc_time *tmp)
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100114{
115 uchar century;
116
Wolfgang Denk397b40c2011-11-04 15:55:12 +0000117 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100118 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
119 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
120
121 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
122
123 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
124 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
125
126 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
127 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
128 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
129 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
130 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200131
132 return 0;
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100133}
134
135
136/*
137 * Reset the RTC. We also enable the oscillator output on the
138 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
139 * according to the datasheet, turning on the square wave output
140 * increases the current drain on the backup battery from about
141 * 600 nA to 2uA.
142 */
143void rtc_reset (void)
144{
145 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
146}
147
Priyanka Jainc3409412015-06-29 15:39:23 +0530148/*
149 * Enable 32KHz output
150 */
151void rtc_enable_32khz_output(void)
152{
153 rtc_write(RTC_STAT_REG_ADDR,
154 RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
155}
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100156
157/*
158 * Helper functions
159 */
160
161static
162uchar rtc_read (uchar reg)
163{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100165}
166
167
168static void rtc_write (uchar reg, uchar val)
169{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
Markus Klotzbuecher0be62722007-01-09 14:57:12 +0100171}
Chuanhua Han55f2bc72019-06-21 16:21:53 +0800172#else
173static int ds3231_rtc_get(struct udevice *dev, struct rtc_time *tmp)
174{
175 uchar sec, min, hour, mday, wday, mon_cent, year, status;
176
177 status = dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR);
178 sec = dm_i2c_reg_read(dev, RTC_SEC_REG_ADDR);
179 min = dm_i2c_reg_read(dev, RTC_MIN_REG_ADDR);
180 hour = dm_i2c_reg_read(dev, RTC_HR_REG_ADDR);
181 wday = dm_i2c_reg_read(dev, RTC_DAY_REG_ADDR);
182 mday = dm_i2c_reg_read(dev, RTC_DATE_REG_ADDR);
183 mon_cent = dm_i2c_reg_read(dev, RTC_MON_REG_ADDR);
184 year = dm_i2c_reg_read(dev, RTC_YR_REG_ADDR);
185
186 if (status & RTC_STAT_BIT_OSF) {
187 printf("### Warning: RTC oscillator has stopped\n");
188 /* clear the OSF flag */
189 dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
190 dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR)
191 & ~RTC_STAT_BIT_OSF);
192 return -EINVAL;
193 }
194
195 tmp->tm_sec = bcd2bin(sec & 0x7F);
196 tmp->tm_min = bcd2bin(min & 0x7F);
197 tmp->tm_hour = bcd2bin(hour & 0x3F);
198 tmp->tm_mday = bcd2bin(mday & 0x3F);
199 tmp->tm_mon = bcd2bin(mon_cent & 0x1F);
200 tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900);
201 tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
202 tmp->tm_yday = 0;
203 tmp->tm_isdst = 0;
204
205 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
206 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
207 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
208
209 return 0;
210}
211
212static int ds3231_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
213{
214 uchar century;
215
216 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
217 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
218 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
219
220 dm_i2c_reg_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
221
222 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
223 dm_i2c_reg_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century);
224
225 dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
226 dm_i2c_reg_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
227 dm_i2c_reg_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
228 dm_i2c_reg_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
229 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
230
231 return 0;
232}
233
234static int ds3231_rtc_reset(struct udevice *dev)
235{
236 int ret;
237
238 ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
239 RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
240 if (ret < 0)
241 return ret;
242
243 return 0;
244}
245
246static int ds3231_probe(struct udevice *dev)
247{
248 i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
249 DM_I2C_CHIP_WR_ADDRESS);
250
251 return 0;
252}
253
254static const struct rtc_ops ds3231_rtc_ops = {
255 .get = ds3231_rtc_get,
256 .set = ds3231_rtc_set,
257 .reset = ds3231_rtc_reset,
258};
259
260static const struct udevice_id ds3231_rtc_ids[] = {
261 { .compatible = "dallas,ds3231" },
262 { .compatible = "dallas,ds3232" },
263 { }
264};
265
266U_BOOT_DRIVER(rtc_ds3231) = {
267 .name = "rtc-ds3231",
268 .id = UCLASS_RTC,
269 .probe = ds3231_probe,
270 .of_match = ds3231_rtc_ids,
271 .ops = &ds3231_rtc_ops,
272};
273#endif