blob: 4948ccd40148cefbf24b697abca9cdebe3d18103 [file] [log] [blame]
Marek Vasut0b263a92020-07-25 16:50:56 +02001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
4 */
5
6#include "stm32mp15xx-dhcom.dtsi"
7
8/ {
9 model = "DH Electronics STM32MP15xx DHCOM DRC02";
10 compatible = "dh,stm32mp15xx-dhcom-drc02", "st,stm32mp1xx";
11
12 aliases {
13 serial0 = &uart4;
14 serial1 = &usart3;
15 serial2 = &uart8;
16 };
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
21};
22
23&adc {
24 status = "disabled";
25};
26
27&dac {
28 status = "disabled";
29};
30
31&gpiob {
32 /*
33 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
34 * GPIO line, however the STM32 UART driver assumes RX happens
35 * during TX anyway and that it only controls drive enable DE
36 * line. Hence, the RX is always enabled here.
37 */
38 usb-hub {
39 gpio-hog;
Marek Vasutec4efd52021-01-02 17:44:47 +010040 gpios = <8 0>;
Marek Vasut0b263a92020-07-25 16:50:56 +020041 output-high;
42 line-name = "rs485-rx-en";
43 };
44};
45
46&gpiod {
47 gpio-line-names = "", "", "", "",
48 "", "", "", "",
49 "", "", "", "Out1",
50 "Out2", "", "", "";
51};
52
53&gpioi {
54 gpio-line-names = "In1", "", "", "",
55 "", "", "", "",
56 "In2", "", "", "",
57 "", "", "", "";
58
59 /*
60 * NOTE: The USB Hub on the DRC02 needs a reset signal to be
61 * pulled high in order to be detected by the USB Controller.
62 * This signal should be handled by USB power sequencing in
63 * order to reset the Hub when USB bus is powered down, but
64 * so far there is no such functionality.
65 */
66 usb-hub {
67 gpio-hog;
Marek Vasutec4efd52021-01-02 17:44:47 +010068 gpios = <2 0>;
Marek Vasut0b263a92020-07-25 16:50:56 +020069 output-high;
70 line-name = "usb-hub-reset";
71 };
72};
73
74&i2c2 {
75 pinctrl-names = "default";
76 pinctrl-0 = <&i2c2_pins_a>;
77 i2c-scl-rising-time-ns = <185>;
78 i2c-scl-falling-time-ns = <20>;
79 status = "okay";
80 /* spare dmas for other usage */
81 /delete-property/dmas;
82 /delete-property/dma-names;
83 status = "okay";
84
85 eeprom@50 {
86 compatible = "atmel,24c04";
87 reg = <0x50>;
88 pagesize = <16>;
89 };
90};
91
92&i2c5 { /* TP7/TP8 */
93 pinctrl-names = "default";
94 pinctrl-0 = <&i2c5_pins_a>;
95 i2c-scl-rising-time-ns = <185>;
96 i2c-scl-falling-time-ns = <20>;
97 status = "okay";
98 /* spare dmas for other usage */
99 /delete-property/dmas;
100 /delete-property/dma-names;
101};
102
103&sdmmc3 {
104 /*
105 * On DRC02, the SoM does not have SDIO WiFi. The pins
106 * are used for on-board microSD slot instead.
107 */
Marek Vasut1399be92020-12-01 11:29:19 +0100108 pinctrl-names = "default", "opendrain", "sleep";
109 pinctrl-0 = <&sdmmc3_b4_pins_a>;
110 pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
111 pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
112 cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
Marek Vasut0b263a92020-07-25 16:50:56 +0200113 disable-wp;
Marek Vasut1399be92020-12-01 11:29:19 +0100114 st,neg-edge;
115 bus-width = <4>;
116 vmmc-supply = <&v3v3>;
117 vqmmc-supply = <&v3v3>;
118 mmc-ddr-3_3v;
119 status = "okay";
Marek Vasut0b263a92020-07-25 16:50:56 +0200120};
121
122&spi1 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&spi1_pins_a>;
125 cs-gpios = <&gpioz 3 0>;
126 /* Use PIO for the display */
127 /delete-property/dmas;
128 /delete-property/dma-names;
129 status = "disabled"; /* Enable once there is display driver */
130 /*
131 * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
132 * also connected to the display board connector.
133 */
134};
135
136&usart3 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&usart3_pins_a>;
139 status = "okay";
140};
141
142/*
143 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
144 * however the STM32MP1 pinmux cannot map them to UART4 .
145 */
146
147&uart8 { /* RS485 */
148 pinctrl-names = "default";
149 pinctrl-0 = <&uart8_pins_a>;
150 rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
151 status = "okay";
152};
153
154&usbh_ehci {
155 phys = <&usbphyc_port0>;
156 status = "okay";
157};
158
159&usbphyc {
160 status = "okay";
161};
162
163&usbphyc_port0 {
164 phy-supply = <&vdd_usb>;
165 vdda1v1-supply = <&reg11>;
166 vdda1v8-supply = <&reg18>;
167};