arch/arm/dts/dragonboard820c.dts

/*
 * Qualcomm APQ8096 based Dragonboard 820C board device tree source
 *
 * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/dts-v1/;

#include "skeleton64.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. DB820c";
	compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		serial0 = &blsp2_uart1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0 0x80000000 0 0xc0000000>;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	soc: soc {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0 0 0xffffffff>;
		compatible = "simple-bus";

		gcc: clock-controller@300000 {
			compatible = "qcom,gcc-msm8996";
			#clock-cells = <1>;
			#reset-cells = <1>;
			#power-domain-cells = <1>;
			reg = <0x300000 0x90000>;
		};

		blsp2_uart1: serial@75b0000 {
			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
			reg = <0x75b0000 0x1000>;
		};

		sdhc2: sdhci@74a4900 {
			 compatible = "qcom,sdhci-msm-v4";
			 reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
			 index = <0x0>;
			 bus-width = <4>;
			 clock = <&gcc 0>;
			clock-frequency = <200000000>;
		 };
	};
};