Thomas Chou | d858799 | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 1 | menu "MTD Support" |
| 2 | |
Miquel Raynal | 4048a5c | 2018-08-16 17:30:18 +0200 | [diff] [blame] | 3 | config MTD_PARTITIONS |
| 4 | bool |
| 5 | |
Miquel Raynal | 888f184 | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 6 | config MTD |
| 7 | bool "Enable MTD layer" |
| 8 | help |
Heinrich Schuchardt | 5558af1 | 2020-09-17 18:07:44 +0200 | [diff] [blame] | 9 | Enable the MTD stack, necessary to interact with NAND, NOR, |
| 10 | SPI-NOR, SPI-NAND, OneNAND, etc. |
Miquel Raynal | 888f184 | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 11 | |
Miquel Raynal | 1de770d | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 12 | config DM_MTD |
Thomas Chou | d858799 | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 13 | bool "Enable Driver Model for MTD drivers" |
| 14 | depends on DM |
| 15 | help |
| 16 | Enable driver model for Memory Technology Devices (MTD), such as |
| 17 | flash, RAM and similar chips, often used for solid state file |
| 18 | systems on embedded devices. |
| 19 | |
Masahiro Yamada | e856bdc | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 20 | config MTD_NOR_FLASH |
| 21 | bool "Enable parallel NOR flash support" |
| 22 | help |
| 23 | Enable support for parallel NOR flash. |
| 24 | |
Chris Packham | 54a54a6 | 2022-05-03 21:24:57 +1200 | [diff] [blame] | 25 | config MTD_CONCAT |
| 26 | bool "Enable MTD device concatenation" |
| 27 | depends on MTD |
| 28 | help |
| 29 | Enable support for concatenating multiple physical MTD devices |
| 30 | into a single logical device. The larger logical device can then |
| 31 | be partitioned. |
| 32 | |
Patrick Delaunay | c39e19a | 2020-02-26 10:28:42 +0100 | [diff] [blame] | 33 | config SYS_MTDPARTS_RUNTIME |
| 34 | bool "Allow MTDPARTS to be configured at runtime" |
| 35 | depends on MTD |
| 36 | help |
| 37 | This option allows to call the function board_mtdparts_default to |
| 38 | dynamically build the variables mtdids and mtdparts at runtime. |
| 39 | |
Adam Ford | 2fe88d4 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 40 | config FLASH_CFI_DRIVER |
| 41 | bool "Enable CFI Flash driver" |
Patrick Delaunay | 0f9595b | 2022-01-04 14:24:00 +0100 | [diff] [blame] | 42 | select USE_SYS_MAX_FLASH_BANKS |
Adam Ford | 2fe88d4 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 43 | help |
| 44 | The Common Flash Interface specification was developed by Intel, |
| 45 | AMD and other flash manufactures. It provides a universal method |
| 46 | for probing the capabilities of flash devices. If you wish to |
| 47 | support any device that is CFI-compliant, you need to enable this |
| 48 | option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> |
| 49 | for more information on CFI. |
| 50 | |
Tom Rini | 2f57139 | 2022-05-13 09:18:27 -0400 | [diff] [blame] | 51 | choice |
| 52 | prompt "Data-width of the flash device" |
| 53 | depends on FLASH_CFI_DRIVER |
| 54 | default SYS_FLASH_CFI_WIDTH_8BIT |
| 55 | |
| 56 | config SYS_FLASH_CFI_WIDTH_8BIT |
| 57 | bool "Data-width of the device is 8-bit" |
| 58 | |
| 59 | config SYS_FLASH_CFI_WIDTH_16BIT |
| 60 | bool "Data-width of the device is 16-bit" |
| 61 | |
| 62 | config SYS_FLASH_CFI_WIDTH_32BIT |
| 63 | bool "Data-width of the device is 32-bit" |
| 64 | |
| 65 | config SYS_FLASH_CFI_WIDTH_64BIT |
| 66 | bool "Data-width of the device is 64-bit" |
| 67 | |
| 68 | endchoice |
| 69 | |
| 70 | config SYS_FLASH_CFI_WIDTH |
| 71 | hex |
| 72 | depends on FLASH_CFI_DRIVER |
| 73 | default 0x1 if SYS_FLASH_CFI_WIDTH_8BIT |
| 74 | default 0x2 if SYS_FLASH_CFI_WIDTH_16BIT |
| 75 | default 0x4 if SYS_FLASH_CFI_WIDTH_32BIT |
| 76 | default 0x8 if SYS_FLASH_CFI_WIDTH_64BIT |
| 77 | help |
| 78 | This must be kept in sync with the table in include/flash.h |
| 79 | |
Thomas Chou | f105691 | 2015-11-07 14:31:08 +0800 | [diff] [blame] | 80 | config CFI_FLASH |
| 81 | bool "Enable Driver Model for CFI Flash driver" |
Miquel Raynal | 1de770d | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 82 | depends on DM_MTD |
Bin Meng | 8fff9e3 | 2021-08-07 13:00:00 +0800 | [diff] [blame] | 83 | select FLASH_CFI_DRIVER |
Thomas Chou | f105691 | 2015-11-07 14:31:08 +0800 | [diff] [blame] | 84 | help |
| 85 | The Common Flash Interface specification was developed by Intel, |
| 86 | AMD and other flash manufactures. It provides a universal method |
| 87 | for probing the capabilities of flash devices. If you wish to |
| 88 | support any device that is CFI-compliant, you need to enable this |
| 89 | option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> |
| 90 | for more information on CFI. |
| 91 | |
Tom Rini | 819b477 | 2022-02-25 11:19:52 -0500 | [diff] [blame] | 92 | config CFI_FLASH_USE_WEAK_ACCESSORS |
| 93 | bool "Allow read/write functions to be overridden" |
| 94 | depends on FLASH_CFI_DRIVER |
| 95 | help |
| 96 | Enable this option to allow for the flash_{read,write}{8,16,32,64} |
| 97 | functions to be overridden by the platform. |
| 98 | |
Tom Rini | e247514 | 2022-05-13 09:36:03 -0400 | [diff] [blame^] | 99 | config SYS_CFI_FLASH_STATUS_POLL |
| 100 | bool "Poll status on AMD flash chips" |
| 101 | depends on FLASH_CFI_DRIVER |
| 102 | |
Adam Ford | 2fe88d4 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 103 | config SYS_FLASH_USE_BUFFER_WRITE |
| 104 | bool "Enable buffered writes to flash" |
| 105 | depends on FLASH_CFI_DRIVER |
| 106 | help |
| 107 | Use buffered writes to flash. |
| 108 | |
| 109 | config FLASH_CFI_MTD |
| 110 | bool "Enable CFI MTD driver" |
| 111 | depends on FLASH_CFI_DRIVER |
| 112 | help |
| 113 | This option enables the building of the cfi_mtd driver |
| 114 | in the drivers directory. The driver exports CFI flash |
| 115 | to the MTD layer. |
| 116 | |
| 117 | config SYS_FLASH_PROTECTION |
| 118 | bool "Use hardware flash protection" |
| 119 | depends on FLASH_CFI_DRIVER |
| 120 | help |
| 121 | If defined, hardware flash sectors protection is used |
| 122 | instead of U-Boot software protection. |
| 123 | |
| 124 | config SYS_FLASH_CFI |
| 125 | bool "Define extra elements in CFI for flash geometry" |
| 126 | depends on FLASH_CFI_DRIVER |
| 127 | help |
| 128 | Define if the flash driver uses extra elements in the |
| 129 | common flash structure for storing flash geometry. |
| 130 | |
Thomas Chou | 38a0f36 | 2015-11-09 14:56:02 +0800 | [diff] [blame] | 131 | config ALTERA_QSPI |
| 132 | bool "Altera Generic Quad SPI Controller" |
Miquel Raynal | 1de770d | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 133 | depends on DM_MTD |
Patrick Delaunay | 0f9595b | 2022-01-04 14:24:00 +0100 | [diff] [blame] | 134 | select USE_SYS_MAX_FLASH_BANKS |
Thomas Chou | 38a0f36 | 2015-11-09 14:56:02 +0800 | [diff] [blame] | 135 | help |
| 136 | This enables access to Altera EPCQ/EPCS flash chips using the |
| 137 | Altera Generic Quad SPI Controller. The controller converts SPI |
| 138 | NOR flash to parallel flash interface. Please find details on the |
| 139 | "Embedded Peripherals IP User Guide" of Altera. |
| 140 | |
Purna Chandra Mandal | 5c99045 | 2016-03-18 18:36:08 +0530 | [diff] [blame] | 141 | config FLASH_PIC32 |
| 142 | bool "Microchip PIC32 Flash driver" |
Miquel Raynal | 1de770d | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 143 | depends on MACH_PIC32 && DM_MTD |
Patrick Delaunay | 0f9595b | 2022-01-04 14:24:00 +0100 | [diff] [blame] | 144 | select USE_SYS_MAX_FLASH_BANKS |
Purna Chandra Mandal | 5c99045 | 2016-03-18 18:36:08 +0530 | [diff] [blame] | 145 | help |
| 146 | This enables access to Microchip PIC32 internal non-CFI flash |
| 147 | chips through PIC32 Non-Volatile-Memory Controller. |
| 148 | |
Marek Vasut | a405a55 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 149 | config RENESAS_RPC_HF |
Heinrich Schuchardt | 5558af1 | 2020-09-17 18:07:44 +0200 | [diff] [blame] | 150 | bool "Renesas RCar Gen3 RPC HyperFlash driver" |
Miquel Raynal | 1de770d | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 151 | depends on RCAR_GEN3 && DM_MTD |
Marek Vasut | a405a55 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 152 | help |
Heinrich Schuchardt | 5558af1 | 2020-09-17 18:07:44 +0200 | [diff] [blame] | 153 | This enables access to HyperFlash memory through the Renesas |
Marek Vasut | a405a55 | 2017-08-19 23:24:08 +0200 | [diff] [blame] | 154 | RCar Gen3 RPC controller. |
| 155 | |
Vignesh Raghavendra | c2dfd0a | 2019-10-23 13:30:01 +0530 | [diff] [blame] | 156 | config HBMC_AM654 |
| 157 | bool "HyperBus controller driver for AM65x SoC" |
| 158 | depends on SYSCON |
| 159 | help |
| 160 | This is the driver for HyperBus controller on TI's AM65x and |
| 161 | other SoCs |
| 162 | |
Patrick Delaunay | cc30ea5 | 2021-10-04 11:05:52 +0200 | [diff] [blame] | 163 | config STM32_FLASH |
| 164 | bool "STM32 MCU Flash driver" |
| 165 | depends on ARCH_STM32 |
Patrick Delaunay | 0f9595b | 2022-01-04 14:24:00 +0100 | [diff] [blame] | 166 | select USE_SYS_MAX_FLASH_BANKS |
Patrick Delaunay | cc30ea5 | 2021-10-04 11:05:52 +0200 | [diff] [blame] | 167 | help |
| 168 | This is the driver of embedded flash for some STMicroelectronics |
| 169 | STM32 MCU. |
| 170 | |
Patrick Delaunay | 0f9595b | 2022-01-04 14:24:00 +0100 | [diff] [blame] | 171 | config USE_SYS_MAX_FLASH_BANKS |
| 172 | bool "Enable Max number of Flash memory banks" |
| 173 | help |
| 174 | When this option is enabled, the CONFIG_SYS_MAX_FLASH_BANKS |
| 175 | will be defined. |
| 176 | |
| 177 | config SYS_MAX_FLASH_BANKS |
| 178 | int "Max number of Flash memory banks" |
| 179 | depends on USE_SYS_MAX_FLASH_BANKS |
| 180 | default 1 |
| 181 | help |
| 182 | Max number of Flash memory banks using by the MTD framework, in the |
| 183 | flash CFI driver and in some other driver to define the flash_info |
| 184 | struct declaration. |
| 185 | |
| 186 | config SYS_MAX_FLASH_BANKS_DETECT |
| 187 | bool "Detection of flash banks number in CFI driver" |
| 188 | depends on CFI_FLASH && FLASH_CFI_DRIVER |
| 189 | help |
| 190 | This enables detection of number of flash banks in CFI driver, |
| 191 | to reduce the effective number of flash bank, between 0 and |
| 192 | CONFIG_SYS_MAX_FLASH_BANKS |
| 193 | |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 194 | source "drivers/mtd/nand/Kconfig" |
Simon Glass | f94a1be | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 195 | |
Tom Rini | b2e25af | 2021-09-22 14:50:36 -0400 | [diff] [blame] | 196 | config SYS_NAND_MAX_CHIPS |
| 197 | int "NAND max chips" |
| 198 | depends on MTD_RAW_NAND || CMD_ONENAND || TARGET_S5PC210_UNIVERSAL || \ |
| 199 | SPL_OMAP3_ID_NAND |
| 200 | default 1 |
| 201 | help |
| 202 | The maximum number of NAND chips per device to be supported. |
| 203 | |
Simon Glass | f94a1be | 2015-02-05 21:41:35 -0700 | [diff] [blame] | 204 | source "drivers/mtd/spi/Kconfig" |
Heiko Schocher | 8f2fe0c | 2016-09-21 07:58:19 +0200 | [diff] [blame] | 205 | |
| 206 | source "drivers/mtd/ubi/Kconfig" |
Miquel Raynal | ce9bdc8 | 2018-08-16 17:30:06 +0200 | [diff] [blame] | 207 | |
| 208 | endmenu |