| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Kumar Gala | e02aea6 | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2009-2011 Freescale Semiconductor, Inc. |
| Kumar Gala | e02aea6 | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * P5020 DS board configuration file |
| Scott Wood | 3e978f5 | 2012-08-14 10:14:51 +0000 | [diff] [blame] | 8 | * Also supports P5010 DS |
| Kumar Gala | e02aea6 | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 9 | */ |
| Kumar Gala | c6d3390 | 2011-08-31 09:50:13 -0500 | [diff] [blame] | 10 | #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ |
| 11 | |
| Kumar Gala | c6d3390 | 2011-08-31 09:50:13 -0500 | [diff] [blame] | 12 | #define CONFIG_NAND_FSL_ELBC |
| Zang Roy-R61911 | 9760b27 | 2012-11-26 00:05:38 +0000 | [diff] [blame] | 13 | #define CONFIG_FSL_SATA_V2 |
| Kumar Gala | c6d3390 | 2011-08-31 09:50:13 -0500 | [diff] [blame] | 14 | #define CONFIG_PCIE3 |
| Kumar Gala | e02aea6 | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 15 | #define CONFIG_PCIE4 |
| Kumar Gala | 6b3a8d0 | 2011-09-10 10:44:13 -0500 | [diff] [blame] | 16 | #define CONFIG_SYS_FSL_RAID_ENGINE |
| Kumar Gala | 4d28db8 | 2011-10-14 13:28:52 -0500 | [diff] [blame] | 17 | #define CONFIG_SYS_DPAA_RMAN |
| Kumar Gala | e02aea6 | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 18 | |
| Timur Tabi | 11860d8 | 2012-10-05 09:48:53 +0000 | [diff] [blame] | 19 | #define CONFIG_SYS_SRIO |
| 20 | #define CONFIG_SRIO1 /* SRIO port 1 */ |
| 21 | #define CONFIG_SRIO2 /* SRIO port 2 */ |
| Liu Gang | c8b2815 | 2013-05-07 16:30:46 +0800 | [diff] [blame] | 22 | #define CONFIG_SRIO_PCIE_BOOT_MASTER |
| Kumar Gala | e02aea6 | 2011-02-09 02:00:08 +0000 | [diff] [blame] | 23 | #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ |
| 24 | |
| 25 | #include "corenet_ds.h" |