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Bo Shenf1960442014-11-10 15:46:22 +08001/*
2 * Configuration settings for the SAMA5D4 Xplained ultra board.
3 *
4 * Copyright (C) 2014 Atmel
5 * Bo Shen <voice.shen@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Wu, Joshb2d387b2015-03-30 14:51:19 +080013#include "at91-sama5_common.h"
Bo Shenf1960442014-11-10 15:46:22 +080014
Wenyou Yangfafa4402017-09-01 16:26:18 +080015#define CONFIG_MISC_INIT_R
16
Bo Shenf1960442014-11-10 15:46:22 +080017/* SDRAM */
18#define CONFIG_NR_DRAM_BANKS 1
Wenyou Yange61ed482017-09-14 11:07:42 +080019#define CONFIG_SYS_SDRAM_BASE 0x20000000
Bo Shenf1960442014-11-10 15:46:22 +080020#define CONFIG_SYS_SDRAM_SIZE 0x20000000
21
Bo Shen0b2a9822014-12-15 13:24:39 +080022#ifdef CONFIG_SPL_BUILD
Wenyou Yang6dbadb42017-04-13 10:31:16 +080023#define CONFIG_SYS_INIT_SP_ADDR 0x218000
Bo Shen0b2a9822014-12-15 13:24:39 +080024#else
Bo Shenf1960442014-11-10 15:46:22 +080025#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang6dbadb42017-04-13 10:31:16 +080026 (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shen0b2a9822014-12-15 13:24:39 +080027#endif
Bo Shenf1960442014-11-10 15:46:22 +080028
29#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
30
Bo Shenf1960442014-11-10 15:46:22 +080031#ifdef CONFIG_CMD_SF
Bo Shenf1960442014-11-10 15:46:22 +080032#define CONFIG_SF_DEFAULT_SPEED 30000000
33#endif
34
35/* NAND flash */
Bo Shenf1960442014-11-10 15:46:22 +080036#ifdef CONFIG_CMD_NAND
37#define CONFIG_NAND_ATMEL
38#define CONFIG_SYS_MAX_NAND_DEVICE 1
Wenyou Yange61ed482017-09-14 11:07:42 +080039#define CONFIG_SYS_NAND_BASE 0x80000000
Bo Shenf1960442014-11-10 15:46:22 +080040/* our ALE is AD21 */
41#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
42/* our CLE is AD22 */
43#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
44#define CONFIG_SYS_NAND_ONFI_DETECTION
45/* PMECC & PMERRLOC */
46#define CONFIG_ATMEL_NAND_HWECC
47#define CONFIG_ATMEL_NAND_HW_PMECC
48#endif
49
Bo Shenf1960442014-11-10 15:46:22 +080050/* LCD */
Bo Shenf1960442014-11-10 15:46:22 +080051#ifdef CONFIG_LCD
52#define LCD_BPP LCD_COLOR16
53#define LCD_OUTPUT_BPP 24
54#define CONFIG_LCD_LOGO
55#define CONFIG_LCD_INFO
56#define CONFIG_LCD_INFO_BELOW_LOGO
Bo Shenf1960442014-11-10 15:46:22 +080057#define CONFIG_ATMEL_HLCD
58#define CONFIG_ATMEL_LCD_RGB565
Bo Shenf1960442014-11-10 15:46:22 +080059#endif
60
61#ifdef CONFIG_SYS_USE_SERIALFLASH
Wu, Josh7a53b952015-08-19 19:11:21 +080062/* override the bootcmd, bootargs and other configuration for spi flash env */
Bo Shenf1960442014-11-10 15:46:22 +080063#elif CONFIG_SYS_USE_NANDFLASH
Wu, Joshdc018fe2015-08-19 19:11:20 +080064/* override the bootcmd, bootargs and other configuration for nandflash env */
Bo Shenf1960442014-11-10 15:46:22 +080065#elif CONFIG_SYS_USE_MMC
Wu, Josh372ca032015-08-19 19:11:18 +080066/* override the bootcmd, bootargs and other configuration for sd/mmc env */
Bo Shenf1960442014-11-10 15:46:22 +080067#endif
68
Bo Shen0b2a9822014-12-15 13:24:39 +080069/* SPL */
70#define CONFIG_SPL_FRAMEWORK
71#define CONFIG_SPL_TEXT_BASE 0x200000
Wenyou Yang6dbadb42017-04-13 10:31:16 +080072#define CONFIG_SPL_MAX_SIZE 0x18000
Bo Shen0b2a9822014-12-15 13:24:39 +080073#define CONFIG_SPL_BSS_START_ADDR 0x20000000
74#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
75#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
76#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
77
Bo Shen0b2a9822014-12-15 13:24:39 +080078#define CONFIG_SYS_MONITOR_LEN (512 << 10)
79
80#ifdef CONFIG_SYS_USE_MMC
Bo Shen0b2a9822014-12-15 13:24:39 +080081#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
82#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shen0b2a9822014-12-15 13:24:39 +080083
84#elif CONFIG_SYS_USE_NANDFLASH
Bo Shen0b2a9822014-12-15 13:24:39 +080085#define CONFIG_SPL_NAND_DRIVERS
86#define CONFIG_SPL_NAND_BASE
87#define CONFIG_PMECC_CAP 8
88#define CONFIG_PMECC_SECTOR_SIZE 512
89#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
90#define CONFIG_SYS_NAND_5_ADDR_CYCLE
91#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
92#define CONFIG_SYS_NAND_PAGE_COUNT 64
93#define CONFIG_SYS_NAND_OOBSIZE 224
94#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
95#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
96#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
97
98#elif CONFIG_SYS_USE_SERIALFLASH
Bo Shen0b2a9822014-12-15 13:24:39 +080099#define CONFIG_SPL_SPI_LOAD
Wenyou Yang6dbadb42017-04-13 10:31:16 +0800100#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
Bo Shen0b2a9822014-12-15 13:24:39 +0800101
102#endif
Bo Shenf1960442014-11-10 15:46:22 +0800103#endif